I have a query regarding the configuration of the SPI module on the ATXmega128A1U.
According to datasheet 8331: bit 6 (ENABLE) of the control register (CTRL) enables the module while bit 4 (MASTER) selects master mode when written to one (see section 22.7.1 CTRL - Control Register). So, if I want to enable a SPI module and configure it as master, both bits shall be set.
Could the bits setting order make a difference (i.e. ENABLE before MASTER)? This seems to be relevant for the SPI port C on a particular batch of MCU devices I am using. Basically, the SPI port C, which is enabled, remains as a slave when trying to set it as master. The chip select (SS, PC4) is configured as output and driven high by the software which complies with the datasheet's guidance.
I came across the AVR1309 SPI driver source file and both bits are set at the same time, hence my question.