ATSAM4S2A SPI and SSC problem

Go To Last Post
2 posts / 0 new
Author
Message
#1
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Hi Everyone,

 

I have an ATSAM4S2A and I want to use the SPI interface in master mode, as well as the SSC in I2S to interface to an audio codec. The SSC works well until I put the SPI in Master mode. The SPI seems to work until I enable an interrupt for the SSC. I cannot get both peripherals to work at the same time.

 

Any help will be very much appreciated!

 

My init for the SSC:

 

void Init_SSC(void) {
	NVIC_SetPriority(SSC_IRQn,2);
	NVIC_EnableIRQ(SSC_IRQn);

	REG_SSC_CR = SSC_CR_RXEN|SSC_CR_TXEN;
	REG_SSC_CMR = 0;

	// Transmit: DataLength= 16, MSB first, 1 Words/Frame, FSLEN=32
	REG_SSC_TFMR = ((16-1)<<0)|(1<<7)|((1-1)<<8)|(1<<23)|(0xF<<16)|(1<<28);

	// Transmit: SCLK from TK, Start on any edge of TF, 1 SCLK delay
	REG_SSC_TCMR = (2<<0)|(7<<8)|(1<<16);

	// Receive: DataLength=16, MSB first, 1 Words/Frame, FSLEN= 32
	REG_SSC_RFMR = ((16-1)<<0)|(1<<7)|((1-1)<<8)|(0xF<<16)|(1<<28);

	// Receive: SCLK from TK, Sample on RisingEdge, Start on TX Start, 1 SCLK delay
	REG_SSC_RCMR = (1<<0)|(1<<5)|(1<<8)|(1<<16);

	REG_SSC_IER = SSC_IER_TXRDY|SSC_IER_RXRDY;
}

 

And for the SPI:

 

void Init_SPI(void) {
	NVIC_SetPriority(SPI_IRQn,1);
	NVIC_EnableIRQ(SPI_IRQn);	

	REG_SPI_CR = SPI_CR_SWRST;				// Reset SPI

	REG_SPI_MR = SPI_MR_MSTR|SPI_MR_PCS(0)|SPI_MR_MODFDIS;		// Set MasterMode
	REG_SPI_CSR = SPI_CSR_BITS_8_BIT | SPI_CSR_SCBR(20);	// Set BitRate at Fper/20

	REG_SPI_IER = SPI_IER_TDRE;				// Enable TDRE Interrupt
	REG_SPI_CR = SPI_CR_SPIEN;				// Enable SPI
}

 

 

Last Edited: Sat. Jun 18, 2022 - 04:11 PM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

It seems the problem was due to the flash wait states. Setting the EEFC_FMR_FWS to 5 solved this problem.