Miscellaneous questions on customizing bootloader of mega4809

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I never thought it will be so borring to make a PC tool to download firmware, nearly finish it.

But there is a problem : flash erasewrite command executed without error, but I can't find them in the flash,still full of 0xFF. [------> _PROTECTED_WRITE() error, should use SPM]

//created by START
/** Datatype for flash address */
typedef uint16_t flash_adr_t;

/** Datatype for EEPROM address */
typedef uint16_t eeprom_adr_t;

/** Datatype for return status of NVMCTRL operations */
typedef enum {
	NVM_OK    = 0, ///< NVMCTRL free, no write ongoing.
	NVM_ERROR = 1, ///< NVMCTRL operation retsulted in error
	NVM_BUSY  = 2, ///< NVMCTRL busy, write ongoing.
} nvmctrl_status_t;

nvmctrl_status_t erasewrite_flash_page(flash_adr_t flash_adr, uint8_t *data)
{

	// Create a pointer in unified memory map to the page to write
	uint8_t *data_space = (uint8_t *)(MAPPED_PROGMEM_START + flash_adr);

	// Write data to the page buffer
	memcpy(data_space, data, PROGMEM_PAGE_SIZE);

	//check status
	while(NVMCTRL.STATUS & 1);//FBUSY
	// Write the flash page
	_PROTECTED_WRITE(NVMCTRL.CTRLA, NVMCTRL_CMD_PAGEERASEWRITE_gc);

	if (NVMCTRL.STATUS & NVMCTRL_WRERROR_bm)
		return NVM_ERROR;
	else
		return NVM_OK;
}

//write flash
const uint8_t __fuse[9] __attribute((used, section(".fuse"))) = {
	0x00, // WDTCFG {PERIOD=OFF, WINDOW=OFF}
	0x00, // BODCFG {SLEEP=DIS, ACTIVE=DIS, SAMPFREQ=1KHZ, LVL=BODLEVEL0}
	0x01, // OSCCFG {FREQSEL=16MHZ, OSCLOCK=CLEAR}
	0xFF, // All reserved bits must be written to ‘1’ when writing the fuses.
	0xFF, // All reserved bits must be written to ‘1’ when writing the fuses.
	0xC9, // SYSCFG0 {EESAVE=SET, RSTPINCFG=RESET, CRCSRC=NOCRC}
	0x07, // SYSCFG1 {SUT=64MS}
	0x00, // APPEND
	0x10, //BOOTEND 0~4095
};

#define XMODEM_PAYLOAD_LEN 128
#define APPCODE_BEGIN (0x1000); //BOOTEND * 256

typedef struct xmodem_chunk {
        uint8_t start;
        uint16_t block;
        uint16_t block_neg;
        uint8_t payload[XMODEM_PAYLOAD_LEN];
        uint16_t crc;
}xmodem_chunk_t;

int main(void)
{
	uint16_t addressToWrite = APPCODE_BEGIN;

	for(int i=0;i<128;i++){
		chunk.payload[i] = i;
	}
	if(NVM_OK != erasewrite_flash_page(addressToWrite,chunk.payload)){
		//...
	}
}

When writing flash,we need to use data space addree?

It did do like that in data space in erasewrite_flash_page().

I try to check in atmel studio, load the prog PROGMEM:

 

we can see the bootload code between 0~0x1000.

 

 

And I should find some data from 0x1000, but no.

 

Last Edited: Sat. Mar 5, 2022 - 01:46 PM
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// Write the flash page
	_PROTECTED_WRITE(NVMCTRL.CTRLA, NVMCTRL_CMD_PAGEERASEWRITE_gc);

use _PROTECTED_WRITE_SPM for spm commands.

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Defined in which files? Can't locate it with Alt+G.

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_PROTECTED_WRITE is in xmega.h, the file should be automatically included by avr/io.h when building code for any Xmega device. 

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What is the best practice for the logic to update firmware through COM?

My current solution is not stable, the PC side app and bootloader often missed each other.

 

My hardware solution:

1) CH340N(USB to USART bridge) connects the PC & MCU through USB;

2) detect if PC connected by CH340N.RTS# (RTS# will be high if PC connected);  

3) no switch to indicate updating firmware.

 

I don't want to check PC connection in main loop, so I notify system the PC connection through ISR attached to pin connected to CH340N.RTS#.

But what connected maybe not PC, it is power bank, e.g. We need to confirm it by data transfered,reset system to execute bootloader if success,otherwise disable USART & exit.

The bootloader will wait for data for a while, jump to app after time out or finish the firmware download.

The PC side app will look for COM and try to transfer data,there are handshake signals to transfer, but the timing is not good for the moment. 

I want to simply the logic and make it more stable, any advice is welcome.

 

I have seen a software switch method: leave sign in EEPROM and reset to bootloader.

It is more stable indeed.

 

Last Edited: Thu. May 19, 2022 - 03:38 AM
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Look at some of the existing protocols like AVR109, STK500(v2) and so on. These normally start with some kind of "hand-shake" for one end to establish that the other is present and ready to go. In AVR109 for example I think the dialog starts with oneend transmitting '?' and the other sending something back in response. If nothing is forthcoming within a short delay then the bootloader just assumes the PC is not wanting to update so it just carries on to start the app.

 

Arduino is kind of interesting (perhaps the most widespread/famous use of AVR bootloader these days). It uses Optiboot which I think is doing stk500. To ensure synchronisation there is also a hardware element to it. The DTR signal from the PC is wired to the reset pin of the AVR so that when the PC end software wants to start bootloading and send new code it opens the COM port and asserts DTR. That momentarily resets the AVR so (because of BOOTSRT) it then restarts back into the bootloader. This ensures the call/response that establishes that both ends are present is bound to work as the PC and the AVR are now "in sync".

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Xiao wrote:
What is the best practice for the logic to update firmware through COM?
USB reset via WinUSB; USB reset is one of the sources of reset for USB megaAVR.

Am uncertain of the USB reset capability of CH340; will take awhile for me to become certain.

An alternative to CH340 (USB UART) is CH55x (USB 8051)

 

Electrical | USB in a NutShell - Chapter 2 - Hardware

[fourth paragraph]

USB transceivers will have both differential and single ended outputs. Certain bus states are indicated by single ended signals on D+, D- or both. For example a single ended zero or SE0 can be used to signify a device reset if held for more than 10mS. A SE0 is generated by holding both D- and D+ low (< 0.3V). Single ended and differential outputs are important to note if you are using a transceiver and FPGA as your USB device. You cannot get away with sampling just the differential output.

Step 5: Reset the USB port | How to recover from USB pipe errors - Windows drivers | Microsoft Docs

WCH MCS-51(8051) USB MCUs | AVR Freaks

 

edit :

CH340 doesn't indicate USB reset though an MCU reset can be by the modem control signals (not CH340N)

CP2102N detects USB reset with indication through a SUSPEND signal.

CP2102N Data Sheet (Silicon Labs)

[1/3 page 17]

The CP2102N exits Suspend mode when any of the following occur: 1. Resume signaling is detected or generated. 2. A USB Reset signal is detected. 3. A device reset occurs. 4. USB Remote Wakeup functionality is enabled and the WAKEUP pin is grounded. On exit of Suspend mode, the SUSPEND and SUSPENDb signals are de-asserted.

 

"Dare to be naïve." - Buckminster Fuller

Last Edited: Sat. May 21, 2022 - 02:27 PM
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It is impossible to reset MCU by hardware now,for I don't want to change the PCB.

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Yes, the basic idea is same.

For I didn't study the Arduino bootloader before,I have lost the chance to make use of COM signals to rest MCU automatically.

I have to detect connection in APP and then reset.

 

Now the workflow:

attach to PC ---> connection detected by MCU  ---> wait for command from PC  ---> reset by WDR ---> bootloader running --->  wait for command from PC  ---> reply and wait for data ---> receive firmware  ---> [receive eeprom data(opt)] ---> jump to APP.

The timing for PC side software & bootloader is important, otherwise the handshake will fail.

There is bug on timing in my code, arranging. 

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Guys,I need your help.

As the sch showed, Power+ connects to battery, VBUS to USB, MCU will powered forever, +5V will controlled by Q4.

In running mode, the battery will be connected forever, and the USB will be connected while updating firmware or charging the battery.

I hope to stop powering any thing before Power+ when USB is broken.

 

There is a bug for design above :

The Q6 Q7 will keep open once USB connected,even after you plug out USB line.

The possible reason: the power for Q6 Q7 is not interrupted.  

 

Schottky diodes is not accaptable ,the voltage drops too much.

I can ignore it if I don't care the power consumption, but I care  (ಠ¿ಠ)

Pray for solution.

 

【update】

this should work,isn't ?

The body-diode will connect D & S regardless of gate conditions.

Is that right?

------->same with Schottky diodes, voltage drop is 0.7V, not acceptable.

 

【update】

Can capcitance provide the voltage difference?

【result】

same with before, left AO3401 will keep open after pluged out from USB.

And the reason is same: there is power supply(battery) to keep it open,the capcitance has no chance to discharge.

And the capcitance can't discharge after broken USB & battery. 

 

Last Edited: Sun. May 22, 2022 - 05:41 AM
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Xiao wrote:
Pray for solution.
Divine guidance is possible though one has to do the effort to "meet" "half" way; what you're doing (a forum post) is usually more expedient.

Xiao wrote:
this should work ...
No

Xiao wrote:
isn't ?
Indeed

Xiao wrote:
The body-diode will connect D & S regardless of gate conditions.

Is that right?

Yes

Xiao wrote:
Can capcitance provide the voltage difference?
Yes though an initial condition must be present (DC, gates leak)

 


 

DZDH0401DW (Ideal Diode Controller) (Diodes Inc.)

Typical Configuration

 

"Dare to be naïve." - Buckminster Fuller

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You have given the solution,thank you.

But, maybe it is not worth to do it with such costs(not only cost,but also try to get the chip)

 

It looks like no simple way to realize it, time to give up.

Thank you guys.

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Xiao wrote:
But, maybe it is not worth to do it with such costs
An ideal diode can be created by discrete jellybean parts though the dV will be greater (possibly increased offset, reduced gain)

Xiao wrote:
(not only cost,but also try to get the chip)
Indeed due to the current semiconductor shortage; the ideal diode integrated circuits are somewhat common.

An operational amplifier cookbook may have an ideal diode circuit(s)

Xiao wrote:
time to give up.
sad

 

"Dare to be naïve." - Buckminster Fuller

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Any way,there is solution, other people can refer.

Thank you for your help.

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