AVR Freaks

It indeed works, thanks for the tip!

However, main problem still persists.

AFAIK, OCR1C is not used in CTC mode.

I noticed something interesting - increasing OCR1A value seems to lengthen low pulse duration - at 128 and 255 I get perfect square waveform.

Examples : OCR1A set to 254 :

OCR1A set to 1:

It's right here

TCCR1A |= (1 << COM1A1);   // CTC mode

I actually clean all the required registers here

    TCCR1A = 0;
    TCCR1B = 0;
    TCNT1  = 0;

I realized I haven't cleared TIMSK register, but after doing it before running any code nothing changed anyway.

A few lines earlier I write 

TCCR1A = 0;

So the whole register should contain zeros, right?

It says Timer1 has CTC mode, which is controlled via COM1A1 i COM1A0. It is in manual - section 12.12.1 TCCR1A – Timer/Counter1 Control Register.

Thanks David! Unfortunately, the code you provided does not work for me, and I believe it isn't suitable for my case :(

You see, what I'm trying to achieve is to have Timer1 trigger an interrupt x (lets assume 1200, whole point is I want to be able to change it easily) times per second - the whole square waveform generation is actually only a test for me to check if interrupts are generated correctly(they unfortunately aren't). My apologies - I should have made it clear from the very beginning.

I remember using similiar approach to the one presented in my code on 328p, and it worked flawlessly. Yes, I'm aware ATtiny works differently to 328p, but I made my best effort to write a similiar code (after consulting the datasheet), which according to my knowledge, should work.

I think I need to ask another question.

Just to make sure we are on the same page, I've added appropriate comments in code which point to my sources on those information. I am using this datasheet.

Could you please look at the following piece of code:

#include <Arduino.h>

ISR(TIMER1_COMPA_vect) { //OCR1A is 51 so this function should be executed 1200 times per second (every 0.832ms)
PINB = 1; // toggle pin B0 state
}
//------------------------------
void setup() {
    pinMode(PIN_B0,OUTPUT); //I'm gonna be testing pin B0
    TCCR1A = (1 << COM1A1);   // Clear on compare match mode - according to table 12-8, page 111 datasheet
    TCCR1B = (1 << CS10) | (1 << CS11) | (1 << CS12);    // 1:64 prescaler - according to table 12-17, page 115 datasheet
    OCR1A = 51; // should trigger 1201 times per second - according to avrCalc (photo included)
    TIMSK = (1 << OCIE1A);  // enable timer compare interrupt - according to 12.12.13, page 122 datasheet
    TCNT1 = 0; //set it to 0 to start the timer - according to 12.12.7, page 129 datasheet
}

void loop() {
}

and tell me why this code does not trigger the interrupt 1200 times per second? It is very important for me to learn why my approach is bad and what's wrong - even more than just copying ready code to make it work.

Here's how I convert 51 OCR1A value to 1200Hz - I use simple program called AVRcalc. Here's a photo from it:

If any further clarification to my code is needed, I'll be happy to provide it.

Thanks for all the help so far :)

Thank you! Turns out there's a big difference between OCR1A and OCR1C -

In datasheet next to OCR1C it says " The Timer/Counter Output Compare Register C contains data to be continuously compared with Timer/Counter1, and a compare match will clear TCNT1."

Next to OCR1A it says " The Timer/Counter Output Compare Register A contains data to be continuously compared with Timer/Counter1. Actions on compare matches are specified in TCCR1A "

So basically what I believe was happening, the interrupt was being triggered but TCNT1 was not being cleared - it kept running until it overflowed and triggered the interrupt once again on overflow (?)

I did a quick test, and my code works if you use OCR1A and then manually set TCNT1 to 0 when interrupt happens.

What mislead me was this part of OCR1A's description : "Actions on compare matches are specified in TCCR1A". I thought if TCCR1A is set to CTC, it will clear TCNT1 when interrupt occurs, which is not the case. Apparently, the only register which causes TCNT1 to be automatically cleared is OCR1C.

Out of curiosity, may I ask why you call this mode of TC1 "CTC-like" ?

Thanks for help once again!