Although these cheap chips have been out for a couple years, I've not seen a lot of English documentation about how to use them. I recently picked up a couple of modules (CH551 & CH552) and wrote about how to get started with them.
I was surprised with how easy the architecture was to learn; it only took me a couple of days to get to the point where I can understand and start to optimize the .asm code output of SDCC. One thing I didn't realize before buying these chips is that the 8051 is not just an instruction set, it's an architecture. That made understanding the timer and UART registers as easy as looking at 8051 UART example code instead of trying to understand WCH datasheet translated from Chinese. Even much the Atmel AT89LP51/52 datasheet is helpful for programming the WCH chips. When it comes to asm programming, I really like the consistent architecture compared to the AVR tiny & mega. A lot of the time I spend writing AVR asm code is comparing datasheets to for things like checking the IO registers to see if they are always below 0x3F so I can use in/out instructions, or if I have to use sts/lds because one of the MCUs has the register in the high address space. I also like that a lot of instructions to not impact the CPU status flags (like Carry & Overflow), so it is easy to write short ISRs without prologues & epilogues of push & pop.
With the soft UART work I've done on the AVR platform, I had recently been writing asm code to implement parity. On the MCS-51, the status register has a Parity bit which updated with the parity of the accumulator. So parity calculation just requires moving the data to the accumulator and reading the P bit.