Buck or Step-Down Converter Schematic

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Hi

I have been searching the web & still cannot find what I want to make a buck or step-down converter using the N-MOSFET.
I have plenty of those from many dead ATX power supply.

I have looked at the ATMEL application note on the battery charger & they use the P-MOSFET.

My aim is the output will be 12V at 2A (ripple around 100mV pp) with an input of 21V <-> 26V DC.
However here the tricky part, I want to use the N-MOSFET as the switcher.
Normally you would use P-MOSFET type.

The components I will use, are an AVR chip, N-MOSFET, fast switching diode, inductor and capacitors.
Frequency 20KHz to 200KHz.(Not that fussy)

Is this possible ?

I know there many companies that have their own switcher ICs.
But, I would prefer to use or roll my own using any avr chip (ATtinyx or ATMegaX) in PWM mode to control the N-MOSFET.

Any suggestion or link will be greatly appreciated.

Cheers
Ken

Edit: 1
Correction

Quote:
My aim is the output will be 15V at 2A (ripple around 100mV pp) with an input of 21V <-> 26V DC.

Last Edited: Sun. Jun 3, 2007 - 05:14 AM
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Hi Ken,

I'm surprised that you can't find a schematic that uses an N-channel FET. Typically, that's all I've seen used for buck converters.

Just off the top of my head, check out the data sheet for the LTC1625. Linear also has a really good spice program to simulate your design called switcher cad3. Might want to see this thread:

https://www.avrfreaks.net/index.p...

I can probably help you on this design if you'd like. But let me know if this info helps at all.

Regards,
Paul

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Hi Paul

Thanks for the infos & link .
In that thread it had a few interesting links.
So I went to all & one of them to lookup the theory on "Buck Converter (Step Down Converter)".
It had the N-MOSFET in the schematic.
http://schmidt-walter.fbe.fh-darmstadt.de/snt/snt_eng/snte_pdf.html

I did earlier on went to this site
http://schmidt-walter.fbe.fh-darmstadt.de/smps_e/smps_e.html
play with the calculation & it was also mention from that same link.
When the values are inputed, it then give the final figures & the drawing.
In the drawing it showed a blank MOSFET not indicating P or N type.
I assume it was for the P type.

While trying to stay away of using commercial switchmode ICs & prefer to use the avr chip to do the job.

I will keep it in mine about the offer to help out later.

Regards
Ken

Edit : 1
How did I miss that thread on ????

Quote:
Nice Switchmode calculations page

Thanks to others who contributed on that thread too.

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Check out the National LM-2725 fet driver. It takes your pwm signal and shifts it to properly drive a high side N-channel fet's gate in a buck configuration. As a bonus, a low side fet may be connected to form a synchronous rectifier thus doing away with the diode and its losses. Very efficient.

Tom Pappano
Tulsa, Oklahoma

Tom Pappano
Tulsa, Oklahoma

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Just be aware that the ground of the controlled circuit will not be the same as ground for the controller circuit.

This is a set-up I'm using for my step down to run some TECs. PS I'm using a logic level FET hence the +5V for the transistors.

Edward

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Hi

Tom

Quote:
Check out the National LM-2725 fet driver

LM2725 - High Speed Synchronous MOSFET Driver [Not recommended for new designs]
LM27222 Recommended Replacement Part For New Designs

Edward

Quote:
Just be aware that the ground of the controlled circuit will not be the same as ground for the controller circuit.

Can you please clarify this statement.(Doesn't make sense)
The drawing you showed is what I had in mind especially from the gate side onward.
If I am not using a logic level Fet then I must supply a logic high voltage level to the gate.

Regards
Ken

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Quote:
LM2725 - High Speed Synchronous MOSFET Driver [Not recommended for new designs]
LM27222 Recommended Replacement Part For New Designs

Yep, the Lm27222 is the same type device. I'm using them in an Avr based 12 volt lead acid battery charging system. I fiddled with all manner of gate drive schemes, and all were a PITA. The driver chip saved space, money, and heat. That is to say there is no noticeable heat generated charging at 1.5 amps using a S08 dual fet in a synchronous buck topology.

Tom Pappano
Tulsa, Oklahoma

Tom Pappano
Tulsa, Oklahoma

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If you are not using a logic level FET (Switches full on at 5V) you have to apply around 10-12V to the Gate and usually no more than 20V. I only had 5V and 24V rails so it was easier for me to use a logic FET than create a 12V supply just to drive it.

If you look at my picture you can see the high output of the converter is tied to +24V, so to get a variable voltage difference the lower rail has to be variable, ie it could only be at ground when turned full on (and not even then as you will have a small resistance in your FET and coil so there will be voltage dropped across them). This limitation is why p-channel FETS are used in some cases despite being harder/more expensive, so that ground is common to all circuits in case they need to communicate. If they don't they could also use something like an optocoupler (aka optoisolator).

Edward

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Hi

Space is not my problem as this going to be use at home.
In my mind I know what I am after but to put it in words is not my strong point.
Here is what I am building.
Transformer 240V~ to 15V~ @ 2A which give me a range of 21V (Load On) to 26V (Load Off).
Then step down to 15V DC with 100mV pp ripple with the buck converter.
Part of this will charge my SLA 12V7A battery.
Also powering the rest of the circuit driving a Luxeon 3W white LED(constant current).
Basically similar to a mini UPS unit but DC mode.

Found an interesting battery charger article in Electronic Design
http://www.elecdesign.com/Articles/Index.cfm?AD=1&ArticleID=15146

Thanks for the extra explanations from Tom & Edward

Ken

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Hi

@Edward
Basically the circuit forms an "up side down" buck circuit.
It produces an output with respect to the positive rail.
This allow the use of cheap N-channel FET as the switching element.

My quick final question, how do you control or stablelise the output voltage?
Must have some feedback to AVR chip via ADC section.
Otherwise it operating in an open loop setup.

Ken

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Correct on all counts.

The output (lower potential, the one that is being varied) voltage will probably have to go through a voltage divider so that it doesn't fry your ADC or AVR chip. Just remember that the voltage is inverted, ie the higher the voltage read the lower the voltage across your load.

As to the control scheme to use it depends on how complex you are willing to get and how accurate a voltage you need and how fast you need the system to react to changes in load and supply voltage etc.
PID (Proportional, Integral, Derivative) is the usual complex choice and you can find some info about it here but simply; Proportional is the base scheme, it doesn't react to any outside changes and will almost always be slighty wrong. Integral acts to minimise this residual error, but only slowly reacts to changes. Derivative reacts quickly to changes but doesn't do anything to get rid of any residual error. You can use any combination of the three, well.. I've never seen any scheme that doesn't use proportional in it..

Edward

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Hi

That is great, now I see what is going on.

Thanks to Edward's patience & advice.

Cheers
Ken

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Ken,

A word of advice (for what it's worth). While I admire your adventuresome spirit in trying to "roll your own", all of the functionality of what you're trying to do with the AVR is already built into these control devices. These devices also have one heck of a lot of extra stuff designed by people lots smarter than you or me (no offense intended). Things like frequency compensation and such.

If you really want to understand what is going on inside without the pain of debugging, I recommend "Demystifying Switching Power Supplies" by Raymond Mack.

Good luck,
Paul

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Hi Paul

Quote:
I recommend "Demystifying Switching Power Supplies" by Raymond Mack.

Much appreciated for the recommendation of the book.
Pretty good read on this book, which I borrowed from the library.

The beauty of my setup is that I am dealing the low side of the mains transformer(15V AC).
Rectified to ~26V DC & work from there.
At least, I am not dealing with 240V AC.
As usual, I have use a power supply that has the current & voltage limits available which is a must for me.

Still working in the electronics field for many years & am aware of the pros & cons.
Never felt comfortable making any circuits that runs directly from the mains.
Protection to the user(s), is one of my motto.

This will be challenge for me as I have never venture in this realm before.

Ken

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I am working on a project quite similar to this one. In fact mine is intended to be a controller for high power LEDs, with an LED readout and a rotary encoder for control.

Currently I based it on Tiny26 with MOSFET IRL2203N driven by TC4427A. And it seems to work quite well.

The schematic is hardly worth posting as it is simply a standard buck controller as described in the links above. A current feedback resistor is attached for monitoring. Voltage feedback via a divider would also obviously be possible.

Even though these are logic level MOSFETs I found that the AVR could not provide sufficient power to fully open them. Also it was necessary to attach 1M resistors to ground on the TC4427A inputs in order to prevent an immediate shoot-through on startup.

I would also like to try a similar setup with a boost converter.

At the moment I am looking for some help with the circuitry powering the controller itself. Efficiency is paramount, as this is intended to be a battery powered device.

I wonder if it would be possible to use the second oscillator to control the voltage of such a circuit, thus having the controller control its own power.

Has anyone tried such a thing? Or would a charge pump approach be more practical? I am doing all I can to minimize part count and inefficiency here, and I would like to be able to run off of all kinds of battery voltages, say 3-24 volts.

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I think something like that should be possible, but
it might be more complicated than one thinks in the beginning.

I would first make a concept for the
CPU-power-supply part that is possible to
operate in steady state for all input/output
voltage/current/power conditions.

Then comes the hard part: How o get the circuit
into steady-state right from the start. So this
means power-up and transients for
all possible combinations. This is probably the
hard part and involves probably changes to decisions
made before.

Then I would try to built it,
starting very carefully.

Keep us informed. Might be some folks here
can help you.

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I've also noticed that more p-channel mosfets are used in buck converters. Can someone explain why?
I thought n types have less resistance and therefore less losses.

e.g http://pdfserv.maxim-ic.com/en/a...

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nick-123 wrote:
I've also noticed that more p-channel mosfets are used in buck converters. Can someone explain why?
I thought n types have less resistance and therefore less losses.

Greetings Nick-123,

There's a minor terminology error in the OP:

pykedgew wrote:
However here the tricky part, I want to use the N-MOSFET as the switcher. Normally you would use P-MOSFET type.

PMOSFet referes to a Power MOSFet, not the
polarity of the channel, as correctly noted
in your question.

If you refer to Fig 2 in the paper that you
cite you'll see that the power switch is
between the supply and the industor, thus
charging the inductor when it conducts. A Buck
converter always outputs a lower voltage
than the input voltage.

If an N-ch PMOSFet was used in this circuit
the gate voltage for the Fet would be more
positive than the input voltage. To do so
would require a second voltage booster.

Using a P-Ch PMOSFet only requires the gate
to be driven towards ground by the control
circuit, which is very easy to do and does
not require a second (higher) internal bias
generator.

In the Boost converter (aka Flyback converter)
shown in Fig 2 the power switch is from
inductor to ground and therefore the gate
drive is positive with respect to ground
and also easily generated from the control
IC (and no additional bias generator).

Comments Welcome!

Peter

--
Peter J. Stonard
www.stonard.com

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Hi Peter,

Thanks for your explanation.

Quote:
If an N-ch PMOSFet was used in this circuit
the gate voltage for the Fet would be more
positive than the input voltage. To do so
would require a second voltage booster.

I do not quite understand why it needs a higher V to conduct. Surely a 5-6V on the gate should be enough?

In the following pdf http://ww1.microchip.com/downloa... a p-channel mosfet is used to drive a led. What would be needed to change figure 4 so that it uses a n-channel fet? (could it just be swapping source and drain ?)

Nick

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nick-123 wrote:
I do not quite understand why it needs a higher V to conduct. Surely a 5-6V on the gate should be enough?

Greetings Nick,

An enhancement mode Fet (such as the PMOSFets
in this thread) require a gate bias with respect
to the Source terminal to conduct. An N-Ch
PMOSFet would require a positive gate bias, while
a P-Ch would require a negative gate bias.

In the buck converter with P-Ch switch the
Source is connected to the input supply, so
the Gate is brought towards ground to make it
negative with respect to input supply and the Fet conduct.

If an N-Ch Fet was substituted the Drain would
be connected to the input supply, and the
Gate would be positive with respect to the
Source, and therefore greater than the input
voltage.
Also, as the original P-Ch
device was a common-source configuration it
inverts. The Common-drain (aka Source follower)
configuration of the N-Ch would require a
gate signal of opposite polarity as it does not
invert.

nick-123 wrote:
What would be needed to change figure 4 so that it uses a n-channel fet? (could it just be swapping source and drain ?)

I assume that you mean Figure 3? (Fig 4 is a graph).

Option A: Replace the P-Ch with an N-Ch, with the
Drain connected to Vbat. The gate drive would
be shifted up by Vgs of the Fet, requiring a
second supply (Vfet) more positive that Vbat. Also,
the comparator output would require level
shifting or the comparator supply fed from
Vfet, and the gate signal polarity inverted
(swapping the inv and non-inv inputs).

Option B: Invert the entire circuit, so that
ground replaces Vbat, and Vbat replaces ground.
Reverse the diode, the LED, and change the P-Ch
Fet to an N-Ch type. Vdrive will need to be
level shifted or replaced by one that swings
from ground, negatively, towards the new Vbat.

Comments Welcome!

Peter

--
Peter J. Stonard
www.stonard.com

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Hi Peter,

Seems that I did not quite understand mosfets. Many thanks for the enlightment.

Assuming that Vbatt=24-30V.
So in option A, the gate needs to be circa 5V higher than Vbatt to conduct. Takes extra components and the possibility that I bust the maximum V_GS of 20V when wrongly interfaced.

Option B seems ok. Just to check if I understand it correctly - is the source of the N-channel mosfet grounded and the drain attached to the inductor, leds, sense resistor and +24V power?
If so, the sense resistor sits then in the high side making the feedback loop complicated. Is that really necessary if I want a constant current through the leds? Can I move the sense resistor between the source and ground? Driving the gate would then be easier I think.

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nick-123 wrote:
So in option A, the gate needs to be circa 5V higher than Vbatt to conduct. Takes extra components and the possibility that I bust the maximum V_GS of 20V when wrongly interfaced.

Greetings Nick,

Well, there's no reason to operate the
Fet's gate anywhere near it's limit...

nick-123 wrote:
Option B seems ok. Just to check if I understand it correctly - is the source of the N-channel mosfet grounded and the drain attached to the inductor, leds, sense resistor and +24V power?

Here's a refresher. This is your starting point with a P-Ch Fet

Here's the first mod. Using a N-Ch Fet

Here's another mod. If the supply input is greater
than the LED voltage drop no SMPS is required.
Instead the N-Ch Fet is used to chop the LED
voltage and monitor the LED current at
the Fet Source. This is integrated to a ramp
to operate the PWM comparator (as in the
starting point diagram). And... We're back
to a positive supply.

Comments Welcome!

Peter

--
Peter J. Stonard
www.stonard.com

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Quote:
PMOSFet referes to a Power MOSFet, not the
polarity of the channel
I think the OP's terminology is correct PMOSFET does refer to a P-Channel device. Although usually you write "pMOSFET". Power MOSFETs have different construction/structure and can be either P-CH or N-CH.

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Hi Peter,

Thanks for your schematics. I've played around with a smilar one like your second mod last weekend (no r6/c3 network, opamp, but with a npn transistor, +5V zener diode and a resistor. Works like a charm but the n-mosfet gets quite warm since it burns off the excess energy. It acts like a resistor.
I'm not sure about your first mod. Why do you use gnd and V- instead of V+/gnd?
Anyway there is still something I do not understand. What is wrong if one uses a n-mosfet in figure 3 (but with drain towards Vbatt and source towards inductor etc. The fet will conduct when there is around 5V on the gate with respect to gnd.

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nick-123 wrote:
I'm not sure about your first mod. Why do you use gnd and V- instead of V+/gnd?

To emphasis that the entire circuit is referenced
to the positive supply. Conventional circuits
are drawn with ground and a positive supply.
In this design the input signal acts in
reference to the positive supply, and is
below ground. This causes a bit of a headache
depending upon where the signal comes from.

nick-123 wrote:
What is wrong if one uses a n-mosfet in figure 3 (but with drain towards Vbatt and source towards inductor etc. The fet will conduct when there is around 5V on the gate with respect to gnd.

It won't work! The N.ch Fet is now a common
drain configuration (better known as a source
follower) and it does not invert. The gate would
have to be positive with respect to the source
and when the Fet is fully conducting the drain
and source are both at the V+ supply, but the
gate would have to be more positive than V+ by
the gate bias (5 to 10V depending upon type).
If a gate bias above the V+ rail is available
the gate signal will need to be inverted to
maintain negative feedback. The comparator
inputs can be swapped, but the comparator would
need the headroom to drive the Fet gate above
the V+ rail.

Comments Welcome!

Peter

--
Peter J. Stonard
www.stonard.com