In the application note AVR109 table 1 the description of mode 4 is "No read access (data or interrupt execution) from the other section."
My interpretation of this is that I can't interrupt code running in the boot section if the interrupt vectors are located in the app section. In other words, if there is a common function located in the bootloader (CRC in my case) it can't be interrupted even if it's called from the app section if the interrupt vectors are located in the app section.
Did I make it clearer or more confusing?
Could this be the case? Why would anyone want it that way?
Or do they mean that an ISR located in the boot section can't be executed from an interrupt vector in the app section?
Please tell me I'm completely wrong...
What I really wonder is if code in the boot section (not using SPM) is possible to interrupt with vectors and ISR in the app section while using boot lock mode 4.