ATSAMS70 Delta Sigma ADC interface suggestions

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I'm wondering what would be the best method to interface to a raw output Delta Sigma Modulator like the AMC3306.  Min/Max clocks are 9/20 mhz.  For what I need, simple totals would suffice, for example if I count 10000 bits in 20000 cycles I know I am at the half point.

 

I've considered SPI/I2S, Timers, and direct DMA to IO.

 

SPI/I2S issues: large volumes of data, this would probably have to be configured to read on demand.  The data would also have to be post processed to count total bits.  Also, the ADC really wants a continuous clock, so either I continually generate clocks or use an external clock and use slave SPI.

 

Timers, I'm unclear how this would be configured.  Ideally this would simply add 1 bit per clock if high.

 

Direct DMA, probably not fast enough, also unclear how bits would be counted.

 

Any other ideas or suggestions?  The STM32 has ASFDM, but the stock...

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Bits 5:4 – BURST[1:0] Burst Signal Selection
Value  Name   Description
0        NONE   The clock is not gated by an external signal.
1        XC0      XC0 is ANDed with the selected clock.
2        XC1      XC1 is ANDed with the selected clock.
3        XC2      XC2 is ANDed with the selected clock.

in TC might be useful, counting in one channel gated by the bitstream and in another channel just count.
/Lars