ATTINY441 'alternative pins'

Go To Last Post
7 posts / 0 new
Author
Message
#1
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Hello, this is my first post to AVR freaks.

 

I've recently completed an electronic design (board layout, plus software) using an AT441 and I've made a small error. I have the TX pin of UART0 to pin 6 (PA7) on the ATTINY441. I did this before the software was written as the board had to be designed and ordered from the suppliers.

 

I have received the boards, and luckily it all works fine, including the software. The problem is the pin allocation for UART0 TX. The default location is pin 13 (PA0), but, as I said, I've put in on pin 6 (PA7). This is NOT the end of the world as serial port is only used for debugging to show me what the software is doing.

 

Looking at table 10-3 in the ATTINY 441/841 datasheet (page 64) I see PA7 (pin 6) can indeed be used for TX0 - it is an 'alternative pin location'. However, I cannot for the life of me work out how to enable this alternative pin location. The datasheet is very confusing in this regard.

 

Here is my UART init code - though I doubt if it is of much help. Any help/pointers are very gratefully received.

 

Regards

 

Mark

        void uart0_init()
        {
            DDRA |= DDA1;          // TX on USART0 (PA1 on pin 12) is an output so better enable it
            PRR &= ~_BV(PRUSART0); // enable USART0 in power reduction register
            UBRR0H = UBRRH_VALUE;  // calculated by setbaud.h
            UBRR0L = UBRRL_VALUE;  // calculated by setbaud.h
            #if USE_2X
                UCSR0A |= _BV(U2X0); // USE_2X calculated by setbaud.h
            #else
                UCSR0A &= ~(_BV(U2X0)); // see 18.12.2
            #endif
            UCSR0C = _BV(UCSZ01) | _BV(UCSZ00); // 8-bit data (8N1)
            UCSR0B = _BV(TXEN0);              // enable TX only (can use receive pin as general IO)
        }

 

This topic has a solution.
Last Edited: Mon. Oct 11, 2021 - 04:13 PM
This reply has been marked as the solution. 
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0


David

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Aha! Perfect that's what I was missing. I should have studied the book a little more. Thank you very much.

 

Mark

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0


Both TX and RX are moved to alternate location when enabled.

Jim

 

 

Keys to wealth:

Invest for cash flow, not capital gains!

Wealth is attracted, not chased! 

Income is proportional to how many you serve!

Lets go Brandon!

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Thanks, Jim. Looks like you and frog_jr posted at pretty much the same time. Appreciate the help.

 

I've got it working now. Well, I have serial output until the processor goes to sleep. Upon wake, I don't have serial output anymore. Well, I assume that's why serial output stops. Works until the first sleep.

 

Mark

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

stratoblaster wrote:
Works until the first sleep.

Output would stop during sleep, but should resume after wake up, I find it helpful when working with sleep modes, to begin with Idle mode, once everything works there, explore deeper sleep modes!

Good luck

Jim

 

 

Keys to wealth:

Invest for cash flow, not capital gains!

Wealth is attracted, not chased! 

Income is proportional to how many you serve!

Lets go Brandon!

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Found it. Sleep mode was not the problem. I had an errant PRR=0xFF in the wrong place (after I set up the serial port and sent an initial "Hello, I'm up and running" message. So... It set up UART0, sent the hello message, THEN it would execute PRR=0xFF and.... turn everything off!

 

Doh. The problem is always between the chair and the keyboard! smiley