AVR Freaks

I usually use 14mil traces for power to the chip (and sometimes 16mil depending on my mood). . .The busses leading from power supply section to chip area are usually 50 mil, 70 mil, or even a filled polygon.   No sense in just etching away good copper that can be put to use.

Does tilting at 45 deg actually provide any help on your large pcb?   Seems like the net gain might be zero, since then no traces will be straight--just wondering

Why are you trying to run a large power trace down the middle of C12?   I never run traces between component pads, or very very rarely & I am truly "stuck".

With a 2 layer board it is very hard to keep an entire layer ground.

It takes care, but can readily be done with just an occasional short jumper (less then 1/2 inch) here & there.   I just did one recently with two 32 TQFP packages six SO-8 & about 100 other misc fets/R/C and  the bottom is nearly "blank" gnd plane.  However, it was a slow process.  I rearranged my connections many times (can the switch go to PB3 or PC5, for example; can the PWM output be on PB1 or PD3?...etc)

For a "slow" AVR (compared to an 800MHz ARM) , being relatively close is prob fine for the cap, like 1/2 inch or so, but not 2 inches away like you sometimes might see (or much worse, no cap at all!!).   Remember we used to to use DIP with leads (pins)  & socket leads & through hole caps---so it is easy to stay way ahead of that.

I'd go for 20-thou as best as I could.

I like that train of thought.  In fact, I like to use the thickest traces everywhere I can, until I run out of room. Why scrimp on connectivity, especially anything carrying some actual current (e.g. other than a logic signal)?  I don't try to make my resistors smallest, but ones that reasonably fit...after all they are supposed to be heaters.  If you get an overload, bigger can be better.   Caps are especially bad...trying to pack max cap in smallest package volume, usually degrades other aspects...give the cap some elbow room to work with & have a nice cap.

I do wonder whether smaller parts are better in terms board flex (cracking),or perhaps it's worse, or same.

 Considering maximum current that can pass through 6 mil trace is 1 Amp mine is just 50mA.

Use care..you are not interested in whether the trace will "burn up"  or drop 0.43 volts along the way using the max limit ...you want a solid connection & low drop.  Doubling a thin width can lower the inductance too (albeit, not nearly as much as a plane).

Your ratio 1000 mA to 50 does seem "decent", 4 inches will be approx 0.33 ohms...but even that is 16mv drop.  However what stops you from using 12mil traces?  Looks like there is plenty of space.  12 mil is much easier to produce than pushing the limit for 6 mil traces.  which will be able to take more abuse, corrosion, etc?

I had a board laid out & specified that one trace would be carrying several amps & to take special note of it.  So they laid it out apparently so it would be "ok"  ....However my  opamp sensing circuit was acting very screwy...found out the signal dropped a few hundred mv from beginning to end (so the sensing was completely overshadowed).  Beefing up the trace with a tacked on wire (roughly 22 gauge) really helped! 

Trace Width and Spacing
The chemical and photographic processes used to produce a PCB put requirements on the minimum width of trace and the minimum spacing between traces. If a trace is made smaller than this minimum width there is some chance it will open (no connection) when manufactured. If two traces are closer together than the minimum spacing there is some chance they will short when manufactured. These parameters are usually specified as "x/y rules", where x is the minimum trace width and y is the minimum trace spacing. For example, "8/10 rules" would indicate 8 mil minimum trace width and 10 mil minimum trace spacing. These rules (especially spacing) apply to any metal on the PCB, including pad to track spacing and line widths for strings on the PCB.

Typical modern process rules are 8/8 rules with values as small as 2/2 rules being available. For Press-n-Peel people have had success using 12/12 rules, but values a little larger are easier to make work consistently. However, keep in mind that the board must be soldered and a trace within 8 mils (8/8 rules) of a pad is easier to short than one with greater spacing when hand soldered. For hand soldering 10/10 rules are much easier to solder (if the design density can allow spacing this large).

I tend to use a ground plane on the top of the board and a vcc plane on the back. ARM chips tend to have four or five power pin pairs... if I have to break a plane on one side I'll stitch it through on the other, but the general aim is to keep as wide and fat a plane as possible. Remember that as far as RF is concerned, there's little difference between a ground and a vcc plane.

Admittedly this is an easy board; the processor doesn't need that many pins in this case; most are unused. But a similar commercial project with the same chip used all the pins bar a couple, and used the same ground/vcc planes, and met the necessary EMI requirements.

Neil

Bill the forum has some bug and it has been reported, I simply use copy the picture (Control C) and then paste it into the post with Control V.

In fact I think I always have done it this way.

I tend to use a ground plane on the top of the board

Well that sounds a bit like an oxymoron----aren't there parts in the way?  Hard to make a nice sheet of plane that way!  If you are careful, you can often make a pretty solid sheet on the bottom layer.