AVR Freaks

I was trying to understand El Tangas's algorithm, and I encounterd difficulties.

Than it poped my mind that maybe he's not meaning Remainder.

I think that many people are using Remainder as "the decimal part of a fractional number",

but it is not absolutely correct.

Thank you.

I studied your algo. Though uses aproximation it's avg. just few fractions of Cycle faster than mine.

I tried hard to get one instruction faster on my algo, but in vain.

I guess aproximation works harder on many Bytes. I'll try there. :-)

I'll update all my sources, from time to time, on first post. (#1)

Thanks a lot.

I'm hopeless. I'm still at contest; can't abstain.

Still the Two Bytes; were I might have found something; though Not Sure Yet!

If you discount the BCD packing, on my 16 bit, I'm at 49,53 clk AVG. <---WRONG , it is 51.53

That's one instruction, and AVG will fall below 49.

Yes, I now I'll be up on MAX; but as I said: "I can't abstain".

These are measurements without counting INPUT and without BCD packing.

I am wrong now, and I was wrong also the first time I did the measurement:

my original version (V2) is         AVG=50.532 Clks   on 0-65535

my actual version (see bellow) AVG=51.98 Clks   on 0-65535

Actual version has this code bellow:

;------

add r16,r0
adc r1,r1
breq PC+11
  ; r1 can be 1 or 3
  dec r1
  breq PC+3        ; it means it was 1, but now is 0
    inc r17
    mov r1,SIX
  add r1,SIX    ; now r1 is SIX or TWELVE
  inc r17        ; increment Quotient
  add r16,r1    ; add SIX or TWELVE
  brcc PC+3    ; possible one do-it-again on Carry resulted from last instruction
   inc r17
   add r16,SIX
; previous 13 instructions: min. 4 and max. 14 clk

;---------------

and this is worse than V2 version:

;----------

 lsr r1            ; r1=0 and possible 1 shifted to C
 brcc PC+4        ; branch if zero (evident)
  inc R17        ; increment Quotient(R1 was one)
  add r16,SIX   ; add SIX; because we INC Quotient
  brcs PC-2    ; possible one do-it-again on Carry resulted from last instruction
; On previous 5 instructions
; if High(INPUT)>$A8 5 or 9 clk, depending on RB256
; if High(INPUT)<$A8 3 or 5 clk, depending on RB256

 add r16,r0      ; we add Remainder on the old one
 brcc PC+4        ; but if we have CARRY?
  inc r17        ; increment Quotient
  add r16,SIX    ; add SIX; because we INC Quotient
  brcs PC-2    ; possible one repeat on Carry resulted from last instruction
; if there were 6 or  9 on previous paragraph we have only 3 clk  here
; if there were 3 or  5 on previous paragraph we have 3 to max. 9 here
;    so, this is somehow compensated (on both) to 6 to max. 15 clk

;---------

Were I can see that "min. 4 and max. 14 clk" is worse than "6 to max. 15 clk"

"much ado about nothing"

49.86 clk

My First Version on Two Bytes AVG under 50 Cycles.

You made me do that nice job; and I'm very glad you did it!

You are right about 65; it was in my mind to change something in comment there, too.

But, I'm still searching on why can't I get one instr. faster. Can't move along until that hepens.

HW mul is very powerfull; I can make "a touch" on the subject, as a pause.

Yes, it would be a good thing to make a change in my thoughts; at least for a while.

AVG 73.18 CLK

This is a DRAFT, still untested, but seems to work; I'll try to fasten and update.  

Att. Removed. It is WRONG. Has 26200/65536 errors on output. I'll be back.

Replaced .DEF SIX=R18 with .DEF SIX=R19; because I was using R18!

Now works 0-65535.

Yes, this I'll have to learn.

It's just a rapid transformation; copy and paste ... Draft, No Deep Thinking. Please excuse.

Thanks.

but have a register that is zero, so you just ADC with zero

I'm doing the same but, Here I have both to:

  - Increment Quotient

  - Add Six to Remainder

And I know i spent few days optimizing this, 'cause the "below 50" uses this.

47.86 clk

My Second Version on Two Bytes AVG under 50 Cycles. (AVRe)

Tested.

; 3529736    Counter with program
;  393215    Counter run empty
; 3136520    Diffrence
;  47.86    Diffrence/65536       My Second Under 50 Cyles Average!
; uses 7 MUL's so it should be         43 Words length  Min/Max 47/50

It was indeed a welcome pause to do the:

Atiny85 BCD UnPacked version.

Result in:   R20:R19:R18:R17:R16   ( R0 is also used )

Max 74 & Min 56 Cycles and measured AVG=65.18

Used Code Segment memory 76 Words

The Unpacked version is less or equal than 74 Cycles.

No.

We are speaking here about 65 ns (at 16MHz)!  <-- There, in red, It was mistakenly written "S".

This is,  I have to do it "because it is there" (was first uttered by Edmund Hillary when he and Tenzing Norgay conquered Mount Everest in 1953).

Added later: May be, some should see my  "/1000" algo.

s= second. I do apologize for any inconvenience.

Time is one of the seven fundamental physical quantities in both the International System of Units (SI) and International System of Quantities.

I deleted the original post.

It was inappropriate.

Sweet Dreams (Are Made Of This).

Who am i to disagree.

 cited from "Eurythmics, Annie Lennox, Dave Stewart - Sweet Dreams (Are Made Of This) (Official Video)".

I have a 4-byte(32bit unsigned) version of about 170clk; hope I'll finish bugs and testing in the next days.

Is there realy a need for numbers larger than 256^4-1 = 4_294_967_295 ?

This post is about speed and anyone may question the need for speed.

As I've already already said,

nobody's compelled to do caving discovery or mind entertainment exercises.