Can't reach maximum value con ADC when using Vcc as external reference. [ATmega128RFA1]

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Is there some gotcha or something?

I can't seem to reach the maximum value of 10 bits when using Vcc as external reference.

 

The microcontroller is powered with 3.3V power supply, the pin AREF is connected to this same source.

The input voltage varies from 0V → 3.3V but the output from the ADC varies from ~50 and peaks at 792 (which is around 2.4V), even if the input voltage is 3.3V, the ADC output maxes at 792.

 

Is there any trick for this?

 

I try the same code on two microcontrollers and got the same problem.

 

I did try the same code with an internal reference and I can reach the 1023 value without any problem (keeping the input voltage in the correct range).

Any ideas?

 

 

My code:

    DDRF &= ~((1<<PF2)|(1<<PF3));
    ADCSRA_struct.aden = 0;     // Shut down ADC
    ADMUX_struct.refs = 0x0;    // Select external reference in pin AREF
    ADMUX_struct.adlar= 0x0;    // Ajuste de resultado a la izquierda: 10bits = ADCH[7:0] | ADCL[7:6]
    ADCSRB_struct.mux5= 0b0;    // Mux 5 bit
    ADMUX_struct.mux  = 0b00010;// Single Input: ADC2, range 0 -> ARef
    ADCSRA_struct.adps = 4;     // Prescaler 16 (CPU = 16Mhz)
								
    PRR0_struct.pradc = 0;      // Disable Power down register
    ADCSRA_struct.aden = 1;     // Enable ADC
    while( !(ADCSRB_struct.avddok) ){}; // Wait
	
    uint16_t result = 0;
    while(1)
    {
	printf_P(PSTR("\tADC "));
	ADCSRA_struct.adsc = 1;         // Start conversion
	while( ADCSRA_struct.adsc );    // Wait
	result = ADC;                   // Read data
	printf("%u - %04X\n", contador, contador); //print as INT and HEX
	delay_ms(1000);
    }

 

This topic has a solution.
Last Edited: Mon. Dec 14, 2020 - 03:09 AM
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tglaria wrote:
the pin AREF is connected to this same source.

Normally one only connects a 100nf cap to AREF pin to act as a noise filter, internal damage can happen depending on vref setting used.

 

Jim

 

Keys to wealth:

Invest for cash flow, not capital gains!

Wealth is attracted, not chased! 

Income is proportional to how many you serve!

 

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From the datasheet:

By default, the successive approximation circuitry requires an input clock frequency between 50kHz and 200kHz.

From your code (1MHz):

    ADCSRA_struct.adps = 4;     // Prescaler 16 (CPU = 16Mhz)

 

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N.Winterbottom wrote:

From the datasheet:

By default, the successive approximation circuitry requires an input clock frequency between 50kHz and 200kHz.

 

From the datasheet, ATmega128RFA1

By default, the successive approximation circuitry requires an input clock frequency between 50 kHz and 4 MHz.

 

:S 

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ki0bk wrote:

tglaria wrote:
the pin AREF is connected to this same source.

Normally one only connects a 100nf cap to AREF pin to act as a noise filter, internal damage can happen depending on vref setting used.

 

Jim

On this chip, the ADC reference has always been configured as an external voltage.

(I'm pretty sure I damaged a chip when using an internal reference and connecting an external voltage to AREF pin)

 

I don't really see that from the datasheet.

I understand  the contrary, actually:

Internal reference voltages of nominally 1.5V, 1.6V or AVDD (1.8V) are provided on-chip.

The 1.6V reference is calibrated to ± 1 LSB during manufacturing.

The reference voltage can be monitored at the REF pin.

Additional de-coupling capacitance at AREF is not required.

A high capacitive loading of AREF will de-stabilize the internal reference voltage generation.

 

An external reference voltage in the range of 0 < VAREF,EXT ≤ VAVDD may be used but must be supplied with a very low impedance. 

 

 

Last Edited: Sat. Dec 12, 2020 - 12:23 PM
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Note that the OP is using the ATmega128RFA1 which appears to have a very different ADC inside.

#1 Hardware Problem? https://www.avrfreaks.net/forum/...

#2 Hardware Problem? Read AVR042.

#3 All grounds are not created equal

#4 Have you proved your chip is running at xxMHz?

#5 "If you think you need floating point to solve the problem then you don't understand the problem. If you really do need floating point then you have a problem you do not understand."

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Brian Fairchild wrote:

Note that the OP is using the ATmega128RFA1 which appears to have a very different ADC inside.

OK - My bad. I thought this was a variant of the venerable ATmega128.  A curse on Microchip and their overloads of the mega family name.

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Be sure to check the ref and signal voltages right on the pin. What do you see?

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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theusch wrote:
ht this was a variant of the venerable ATm

Reference = ~3.296V

Voltage on ADC pin = [0.056V, ... , 2.44V (from voltage, the ADC value doesn't change, it tops at 792), ... 3.321V]

 

Voltage on input and reference look correct.

 

 

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You do have EVERY power & gnd pin connected, correct?  Expect severe troubles, if you don't.

 

even if the input voltage is 3.3V

Are you physically verifying this voltage is seen at the pin with a multimeter (or possibly a scope)...never assume the voltage makes it there.  A bad solder joint can do you in. 

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

Last Edited: Sun. Dec 13, 2020 - 06:50 AM
This reply has been marked as the solution. 
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Section 35.1 Absolute Maximum Ratings

 

Maximum voltage for Vana (pins 8,9,21,22,60,62) is 2.0V

 

One of those pins (60) is Avdd.

 

 

 

 

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One of those pins (60) is Avdd.

 

An external reference voltage in the range of 0 < VAREF,EXT ≤ VAVDD may be used but must be supplied with a very low impedance.

 

It seems that in 570 pages of datasheet, there is simply no room to simply say the max allowable external Vref is 2.0V.  They do refer you to a page in the datasheet to see the low resistance that is needed.  That is what you will find, doing a search for Avdd.

In several places they mention things that are limited to a max value of Avdd.

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

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Moreover - In the correct device datasheet (see #7) I  find this:

 

3.2 Pin Descriptions

3.2.1 EVDD External analog supply voltage.

3.2.2 DEVDD External digital supply voltage.

3.2.3 AVDD Regulated analog supply voltage (internally generated).

3.2.4 DVDD Regulated digital supply voltage (internally generated

...

In common with many RF transceivers the analog section of the IC works at 1.8V which is supplied from an internal voltage regulator.

 

In other words Avdd is an output provided for the purpose of connecting an external bypass capacitor to meet the requirements of this internal voltage reg.

 

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avrcandies wrote:
You do have EVERY power & gnd pin connected, correct?  Expect severe troubles, if you don't.

even if the input voltage is 3.3V

Are you physically verifying this voltage is seen at the pin with a multimeter (or possibly a scope)...never assume the voltage makes it there.  A bad solder joint can do you in. 

I have every power and GND pins connected.

I can't really get to the pin (it's a QFN package), but on the traces/pads on those pins I measure the correct values with a multimeter.

 

balisong42 wrote:

Section 35.1 Absolute Maximum Ratings

 

Maximum voltage for Vana (pins 8,9,21,22,60,62) is 2.0V

 

One of those pins (60) is Avdd.

 

Jesus, that looks like it is.
Which is kind of weird, since for differential input, the range goes up to VEDD, which can go up to 3.6V.-

 

I'll try to check this.
If that's the maximum output, I'll have to check what to do.

 

EDIT: Ok, this did it.

Using Vcc/2 as AREF (Vcc = ~3.6), using differential inputs, I can use AREF = Vcc/2 as negative input and 0~Vcc as positive input.

This allows me to use the whole range.

Of course, now 0V = 1023 (-512), Vcc/2 is 0, and Vcc is 511, but that's just math.

 

Thanks.

 

N.Winterbottom wrote:

Moreover - In the correct device datasheet (see #7) I  find this:

3.2 Pin Descriptions

3.2.1 EVDD External analog supply voltage.

3.2.2 DEVDD External digital supply voltage.

3.2.3 AVDD Regulated analog supply voltage (internally generated).

3.2.4 DVDD Regulated digital supply voltage (internally generated

...

In common with many RF transceivers the analog section of the IC works at 1.8V which is supplied from an internal voltage regulator.

 

In other words Avdd is an output provided for the purpose of connecting an external bypass capacitor to meet the requirements of this internal voltage reg.

I do have a capacitor on Avdd pin(s), I did not realize the limit on the AREF pin, specially since in differential input, the ADC range is 0- VEVDD which can go up to 3.6V.
Wasn't expecting that 2V limit (and since other microcontrollers have the supply voltage as maximum value for the AREF pin), my mistake on not reading that part.

Last Edited: Mon. Dec 14, 2020 - 03:13 AM