Although I can often do better than gcc's code generation, I recently found it can optimize constant loading to avoid using ldr. For example:
num = 8192;
will generate:
movs rN, #128 lsls rN, rN, #6
But when I write ARM asm, I write it as:
ldr rN, =8192
I'm wondering if there are any assembler tricks that would automatically convert the ldr into movs + lsls when the value can be composed from an 8-bit immediate + a shift.
You mean "Thumb" (CM0, CM0+) rather than "Thumb2" (CM3, CM4), I think.
Thumb2 has a 32-bit version of the MOV instruction that generates rotated 8bit constants (and others!) With CM3 and better, the "mov" instruction will typically generate the proper instruction whenever one of the magic patterns is involved (it also has a straight 16bit constant version.)
CM0 doesn't have most of the 32bit instructions. The combination you mention is interesting because it lets you create some of the 32bit "mov" values in the same 32bits as the Thumb2 instruction (even though it's two instructions.)
No, I don't know of any magic macro in common use to generate the minimal sequence of instructions for any constant. :-(
