EERIE (ATmega328P)

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Hello,

 

I've just read the section about the EERIE (EEPROM Ready Interrupt Enabled) bit in the datasheet of ATmega328P. It says,

 

"Writing EERIE to one enables the EEPROM Ready Interrupt if the I bit in SREG is set. Writing EERIE to
zero disables the interrupt. The EEPROM Ready interrupt generates a constant interrupt when EEPE is
cleared. The interrupt will not be generated during EEPROM write or SPM."

 

So does this mean that, if you have set EERIE to 'one',  an interrupt request will occur while EEPE is cleared (even after serving the ERDY interrupt) or does this only happen once when the EEPE bit flips from 'one' to 'zero' ?

 

I think it is the former, but I am not 100% sure. I've tried to test this case in a simulator under Linux, but it seems that no interrupt occurs at all.

 

Thanks for reading.

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Last Edited: Fri. Nov 6, 2020 - 04:31 PM
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The usual sequence would surely be:

 

1) enable EERIE

2) sei

3) setup data/addr

4) write to EEPE to trigger write

5) wait

 

If you didn't use an interrupt you would just keep polling EEPE until you see it transition from 1 back to 0 to show the write is complete but this involves waiting/looping. The idea of the interrupt is that you can set EEPE then get on with other stuff. As EEPE transitions from 1 to 0 to show the end of the write it will then trigger the EERIE interrupt handler (which presumably is your opportunity to set up to write more bytes and retrigger until all is written).

 

Are you talking about the condition where you do steps 1..4 but then, before EEPE changes state you deliberately write to it to try and abort the operation or something?

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Hey clawson,

 

thank you for your respond. This phrase in the datasheet confused me a bit:

 

"The EEPROM Ready interrupt generates a constant interrupt when EEPE is
cleared."

 

And that's why I am asking here. For me this sounds like: As long as EEPE is set to 'zero' an interrupt request is coming in (of course, assuming global interrupts are enabled), even if the ERDY IRQ was served before. That is my understanding of a "constant interrupt". Is this correct ?

 

Thank you.

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What happens in the simulator (easy place to check stuff like this) ?

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As I previously mentioned, there is no interrupt at all. Maybe the simulator is not supporting ERDY interrupts, I don't know. I am using Linux, so I have to use alternatives to Atmel Studio (I don't want to mess around with Whine).

 

If noone knows the answer, I will have to test it on an Arduino board later. Thanks again :)

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Ok, I can see where that is confusing, it's similar in operation to the USART UDRE and it's operation with interrupts. When the eeprom is ready to write new data(EEPE is clear) and if the interrupt enable bit is set(EERIE) an interrupt will happen, in the ISR() a new write is started or you disable the interrupts by clearing EERIE before returning.

As long as the interrupts are enabled(EERIE is set), interrupts will happen every time the eeprom is ready for the next write(EEPE is clear) until you disable the interrupts when no more data needs to be written.

 

Like most things, if the timing is not critical, it is easier to just poll the EEPE bit, if clear, then its ok to start an eeprom write operation, then go do other things, looping back to poll again for the next write. 

 

Jim

 

 

 

 

 

 

(Possum Lodge oath) Quando omni flunkus, moritati.

"I thought growing old would take longer"

 

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Thank you ki0bk for the answer :)