resident self-hosted debugger for Cortex-M ?

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Is there a resident (or "self-hosted") debugger that runs on Cortex-M CPUs?   Something that could reside in flash, and works like CP/M's DDT or MSDOS "debug"?

Is such a thing possible (I think it should be)?  It would be acceptable if the program being debugged had to be resident in RAM...

 

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You mean like an old-school debug monitor?

 

Something like this:  https://github.com/adamgreen/mri ?

 

westfw wrote:
Is such a thing possible (I think it should be)? 

If 8051s could do it, I don't see why a Cortex-M shouldn't ...

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You mean like an old-school debug monitor?

Yes.

 

Something like this:  https://github.com/adamgreen/mri ?

That probably contains a bunch of useful bits and pieces, but it seems to be designed to interact with gdb on a host ("gdb-stub" or maybe "semi-hosting"?), while I want something that interacts with a dumb terminal.

 

 

If 8051s could do it, I don't see why a Cortex-M shouldn't ...

 

Well, there was a generation or two of microcontrollers that pretty much decided that debugging should only work with an external debugger - no single-step mode, no breakpoint instruction that worked "internally", and of course no writable program memory (not without great difficulty, anyway.)  AFAIK, neither the 8bit PICs nor AVRs are capable of supporting a resident debugger of the sort I'm looking for...

Cortex-M has a bunch of debug features, but it's difficult to skim the documentation and figure our which ones work in a standalone fashion, and which interact only with an external debugger.  For example, the BKPT instruction says:

 

  • A DebugMonitor exception. If Halting debug is disabled and the DebugMonitor exception is enabled, a debug event causes a DebugMonitor exception when the group priority of the DebugMonitor exception is greater than the current execution priority.

    Halting debug is disabled when the DHCSR.C_DEBUGEN bit is set to 0 or disabled by the Debug authentication interface, see Debug Halting Control and Status Register, DHCSR on page C1-700 and Debug authentication on page C1-688, and the DebugMonitor exception is enabled when the DEMCR.MON_EN bit is set to 1, see Debug Exception and Monitor Control Register, DEMCR on page C1-706.

 

Last Edited: Tue. Jun 23, 2020 - 05:12 AM
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Dunno if you're still looking into this, but I've just been tidying up some papers and come across these:

 

Cortex-M4 Monitor Mode:  https://www.mikrocontroller.net/topic/396104

 

Vector Catch:  https://www.keil.com/support/docs/3782.htm

 

You might also want to look at Segger's "Monitor Mode Debug":

 

https://www.segger.com/products/debug-probes/j-link/technology/monitor-mode-debugging/

 

the part of that which goes in the J-Link is proprietary & closed, but you do get to see the bit which goes on the Target ...

 

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  4. Difference between a crystal, and a crystal oscillatorhttps://www.avrfreaks.net/comment...
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Dunno if you're still looking at this, but I just came across this:

 

https://interrupt.memfault.com/blog/cortex-m-debug-monitor

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Thanks.  that looks relatively distant from what I was hoping for (still relies on gdb for UI?), but there's a lot of useful explanation there!

 

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westfw wrote:
(still relies on gdb for UI?),

I don't think it relies on it - I think he's just using that as an example that will be familiar to his readership?

 

The article does refer somewhere to using a simple terminal interface  ...

 

Anyhow, glad there was some useful stuff in it

Top Tips:

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  2. "Garbage" characters on a serial terminal are (almost?) invariably due to wrong baud rate - see: https://learn.sparkfun.com/tutorials/serial-communication
  3. Wrong baud rate is usually due to not running at the speed you thought; check by blinking a LED to see if you get the speed you expected
  4. Difference between a crystal, and a crystal oscillatorhttps://www.avrfreaks.net/comment...
  5. When your question is resolved, mark the solution: https://www.avrfreaks.net/comment...
  6. Beginner's "Getting Started" tips: https://www.avrfreaks.net/comment...