Info: New AVR-Instruction-Set-Manual

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Perhaps not new info for some but the manual got a HUGE improvement.

 

http://ww1.microchip.com/downloa...

 

 

I looked through it fast, and the only direct error I see is that the MOVW instruction is marked as be in all AVR's except those with only 16 registers.

But no AVR's before 2000 (perhaps late 1999) had the instruction.

I think that it's developed together with the MUL instruction, but all later designs of tiny's also would have the instruction. 

 

Add

One of the GCC experts can probably find a list of all "old" chips avr0 or whatever the type without MOVW is called. 

Last Edited: Tue. Jun 9, 2020 - 08:41 AM
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I started AVR from AT90S1200 but I don't know any older chips.
Do you know the model number of the chip whose mcu type is avr0?

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I was hoping that some of the GCC experts would come with a list (the compiler backend needs to known if it can use the instruction).

 

But next to me is a 1999 AVR book.

And the list is:

1200

2313

2323 2343

2333 4433

4414 8515

4434 8535

8534

tiny 10 11 12  (this is not the 16 register 10)

tiny 15

tiny 22

mega 603 103

 

tiny2313 and mega8515 is new replacements, and are new designes with MOVW   

 

 

Add:

I found this about the compiler/assembler (so there are no avr0) 

 

Instruction set avr1 is for the minimal AVR core, not supported by the C compiler, only for assembler programs (MCU types: at90s1200, attiny10, attiny11, attiny12, attiny15, attiny28).

 

Instruction set avr2 (default) is for the classic AVR core with up to 8K program memory space (MCU types: at90s2313, at90s2323, attiny22, at90s2333, at90s2343, at90s4414, at90s4433, at90s4434, at90s8515, at90c8534, at90s8535).

 

Instruction set avr3 is for the classic AVR core with up to 128K program memory space (MCU types: atmega103, atmega603, at43usb320, at76c711).

 

And from avr4 it will have it

Last Edited: Tue. Jun 9, 2020 - 01:07 PM
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Let me help you with that from my May 1997 databook smiley...

 

sparrow2 wrote:

But next to me is a 1999 AVR book.

And the list is:

1200

2313

2323 2343

2333 4433

4414 8515

4434 8535

8534

tiny 10 11 12  (this is not the 16 register 10)

tiny 15

tiny 22

mega 603 103

 

I believe those 4 are the very first AVRs. Certainly in October '95 Atmel only had 8051 derivatives in their microcontroller databook.

#1 Hardware Problem? https://www.avrfreaks.net/forum/...

#2 Hardware Problem? Read AVR042.

#3 All grounds are not created equal

#4 Have you proved your chip is running at xxMHz?

#5 "If you think you need floating point to solve the problem then you don't understand the problem. If you really do need floating point then you have a problem you do not understand."

Last Edited: Tue. Jun 9, 2020 - 01:16 PM
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None of those I listed have MOVW.

 

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Apparently, the one shown in the updated Instruction Set Summary is not "all AVR's except those with only 16 registers".

 

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Not sure how up to date/authorative it is but the AVR-LibC manual has a list of "architectures":

 

https://www.nongnu.org/avr-libc/user-manual/using_tools.html

 

(the C compiler needs to know this stuff so when, for example '*' is used in code it knows whether it can just use MUL or it needs a soft implementation (Tiny))

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Wikipedia has a decent summary:

https://en.wikipedia.org/wiki/Atmel_AVR_instruction_set

 

MOVW appeared with AVR2.5.

 

Optional feature instructions

Three instructions are present only on models which have the corresponding hardware facility

  • SPMfor storing to flash ROM, is present only on processors with flash ROM (most of them)
  • BREAKfor invoking the on-chip debugger, is omitted on some small models without on-chip debugger support
  • DESfor performing Data Encryption Standard rounds, is present on XMEGA models with DES accelerator support

Architectures other than AVR1 are named according to avr-libc conventions.[2]

Family Members Arithmetic Branches Transfers Bit-Wise
Minimal AVR1 Core AT90S1200
ATtiny11
ATtiny12
ATtiny15
ATtiny28
ADD
ADC
SUB
SUBI
SBC
SBCI
AND
ANDI
OR
ORI
EOR
COM
NEG
SBR
CBR
INC
DEC
TST
CLR
SER
RJMP
RCALL
RET
RETI
CPSE
CP
CPC
CPI
SBRC
SBRS
SBIC
SBIS
BRBS
BRBC
BREQ
BRNE
BRCS
BRCC
BRSH
BRLO
BRMI
BRPL
BRGE
BRLT
BRHS
BRHC
BRTS
BRTC
BRVS
BRVC
BRIE
BRID
LD
ST
MOV
LDI
IN
OUT
LPM (not in AT90S1200)
SBI
CBI
LSL
LSR
ROL
ROR
ASR
SWAP
BSET
BCLR
BST
BLD
SEC
CLC
SEN
CLN
SEZ
CLZ
SEI
CLI
SES
CLS
SEV
CLV
SET
CLT
SEH
CLH
NOP
SLEEP
WDR
Classic Core up to 8K Program Space ("AVR2") AT90S2313
AT90S2323
ATtiny22
AT90S2333
AT90S2343
AT90S4414
AT90S4433
AT90S4434
AT90S8515
AT90C8534
AT90S8535
ATtiny26
new instructions:
ADIW
SBIW
new instructions:
IJMP
ICALL
new instructions:
LD (now 9 modes)
LDD
LDS
ST (9 modes)
STD
STS
PUSH
POP
(nothing new)
AVR2, with MOVW and LPM instructions ("AVR2.5")
  • ATa5272
  • ATtiny13/a
  • ATtiny2313/a
  • ATtiny24/a
  • ATtiny25
  • ATtiny261/a
  • ATtiny4313
  • ATtiny43u
  • ATtiny44/a
  • ATtiny45
  • ATtiny461/a
  • ATtiny48
  • ATtiny828
  • ATtiny84/a
  • ATtiny85
  • ATtiny861/a
  • ATtiny87
  • ATtiny88
(nothing new) new instructions:

 

  • MOVW
  • LPM (Rx, Z[+])
(nothing new) (nothing new)
Classic Core with up to 128K ("AVR3") ATmega103
ATmega603
AT43USB320
AT76C711
(nothing new) new instructions:
JMP
CALL
new instructions:
ELPM (in "AVR3.1")
(nothing new)
Enhanced Core with up to 8K ("AVR4") ATmega8
ATmega83
ATmega85
ATmega8515
new instructions:
MUL
MULS
MULSU
FMUL
FMULS
FMULSU[3]
(nothing new) new instructions:
MOVW
LPM (3 modes)
SPM
(nothing new)
Enhanced Core with up to 128K ("AVR5", "AVR5.1") ATmega16
ATmega161
ATmega163
ATmega32
ATmega323
ATmega64
ATmega128
AT43USB355
AT94 (FPSLIC) AT90CAN series
AT90PWM series
ATmega48
ATmega88
ATmega168
ATmega162
ATmega164
ATmega324
ATmega328
ATmega644
ATmega165
ATmega169
ATmega325
ATmega3250
ATmega645
ATmega6450
ATmega406
(nothing new) ELPMX ("AVR5.1") (nothing new) new instructions:
BREAK
Enhanced Core with up to 4M ("AVR5" and "AVR6") ATmega640
ATmega1280
ATmega1281
ATmega2560
ATmega2561
(nothing new) new instructions:
EIJMP
EICALL
(nothing new) (nothing new)
XMEGA Core ("avrxmega" 2-6) ATxmega series new instructions:
DES
(nothing new) new instructions:
(from second revision silicon - AU,B,C parts)
XCH
LAS
LAC
LAT
(nothing new)
Reduced AVRtiny Core ("avrtiny10") ATtiny40
ATtiny20
ATtiny10
ATtiny9
ATtiny5
ATtiny4
(Identical to minimal core, except for reduced CPU register set) (Identical to classic core with up to 8K, except for reduced CPU register set) Identical to classic core with up to 8K, with the following exceptions:
LPM (removed)
LDD (removed)
STD (removed)
LD (also accesses program memory)
LDS (different bit pattern)
STS (different bit pattern)
Reduced CPU register set
(Identical to enhanced core with up to 128K, except for reduced CPU register set)

Instruction encoding

"Experience is what enables you to recognise a mistake the second time you make it."

"Good judgement comes from experience.  Experience comes from bad judgement."

"Wisdom is always wont to arrive late, and to be a little approximate on first possession."

"When you hear hoofbeats, think horses, not unicorns."

"Fast.  Cheap.  Good.  Pick two."

"We see a lot of arses on handlebars around here." - [J Ekdahl]

 

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Thanks for clearing that up, I did not see that the table didn't cover all versions. (I just looked at the table and then at the description of the MOVW instruction that show that all AVR's have th instruction (but AVRrc))   

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Very nice list.

 

Only comment is that AVR3 is older than AVR2.5 and don't have MOVW (but don't matter the mega128 is the replacement for 103 and has everything)