Can the AVR128DA series operate at 24MHz even at 1.8V?

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In one article it was written:
"In the AVR-DA family, the CPU core operates at 24MHz in all voltage ranges."

 

If you look at the current data sheet, there are items that affirm that.

If this is the case, I think Microchip is promoting this part more, but what do you guys think?

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Oh, I was only looking at the datasheet.
It's written in the overview ...

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RF megaAVR are one instance of 16MHz at 1.8V; the CPU in AVR DA are a follow-on with design and process improvements (transistor geometry, impurity reduction, transistor defect reduction, the reduced leakage at elevated temperature is impressive)

AVR DB-series replaces the PTC by op amps and MVIO (multi-voltage I/O, a hint of level translation)

 

ATmega256/128/64RFR2 Datasheet

[page 3]

Figure 3-1 Block Diagram

[VCORE=1.8V]

AVR128DA28 - 8-bit Microcontrollers

AVR128DB28 - 8-bit Microcontrollers

 

"Dare to be naïve." - Buckminster Fuller

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The overview (product brief?) says:

AVR® CPU: – Running at up to 24 MHz – Single-cycle I/O access – Two-level interrupt controller – Two-cycle hardware multiplier – Supply voltage range: 1.8V to 5.5V

http://ww1.microchip.com/downloads/en/DeviceDoc/40002164A.pdf

 

also I found:

The AVR DA family of microcontrollers feature the well-known AVR® CPU, now running at up to 24 MHz across the full supply voltage range of 1.8V to 5.5V.

Let's hope final datasheet reflects that!!

Not sure where the electrical graphs are yet...prelim datasheet, not full details...

 

Here is some serious errata ...so far, so good??

http://ww1.microchip.com/downloads/en/DeviceDoc/80000882A.pdf

 

A nice DA user's guide (I didn't look much at it).

http://ww1.microchip.com/downloads/en/Appnotes/AN3429-Getting-Started-AVRDA-Family-DS00003429A.pdf

 

 

 

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

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avrcandies wrote:

 

Here is some serious errata ...so far, so good??

http://ww1.microchip.com/downloads/en/DeviceDoc/80000882A.pdf

 

Says this 

" 2.3 PORT - I/O Pin Configuration 2.3.1

Digital Input on Pin Automatically Disabled When Pin Selected for Analog Input If an input pin is selected to be analog input, the digital input function for those pins is automatically disabled.

Work around : None."

 

A slightly strange errata, as that's 'normal operation' to me for any MCU ? 

The reason you often select analog mode, is precisely to disable the Digital buffer transition current for values roughly mid-rail. Otherwise, you cannot avoid quite high idle currents for any pin mid-rail.

 

 

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I saw that 2.3 and wondered too.  Most AVR chips have a DIDR  register/bits to disable the digital input...so perhaps the changeover here was only partially done.

 

for this chip:

The digital input buffer for pin n (Pxn) can be configured in the Input/Sense Configuration (ISC) bit field in the Pin n Control

 

Sounds like what was supposed to be manual control has been made automatic (and no longer matches datasheet)

 

Bits 2:0 – ISC[2:0] Input/Sense Configuration This bit field controls the input and sense configuration of pin n. The sense configuration determines how a port interrupt can be triggered.

Value Name Description

0x0 INTDISABLE Interrupt disabled but digital input buffer enabled  ...oops apparently not if analog selected

0x1 BOTHEDGES Interrupt enabled with sense on both edges

0x2 RISING Interrupt enabled with sense on rising edge

0x3 FALLING Interrupt enabled with sense on falling edge

0x4 INPUT_DISABLE Interrupt and digital input buffer disabled(1)

0x5 LEVEL Interrupt enabled with sense on low level other — Reserved

 

elsewhere:

The digital input buffer for pin n (Pxn) can be configured in the Input/Sense Configuration (ISC) bit field in the Pin n Control (PORTx.PINnCTRL) register.

 

elsewhere:

Important:  For lowest power consumption, disable the digital input buffer of unused pins and pins that are used as analog inputs or outputs.

 

They try making what used to be simple, complex, and end up creating logic holes!   Sound like they mostly need to get the wording straightened out

 

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

Last Edited: Mon. May 25, 2020 - 06:06 AM
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I would prefer manual control.  Whereas in most low-power applications of course you would want to disable the input buffer, I can imagine a few situations where I might want both, where power wasn't a major considerations.

 

I generally dislike when hardware makes choices for me, in particular when I don't have the option of reversing that choice.

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