SAMD21J18A not working after some time

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Hello,
I have a problem with my new board architecture based on SAMD21J18A.

The FW works properly but after some days it completely stop running.
I've also implemented a WDT based reset which occurs after 1 hour if the code is stuck, but it doesn't help in this situation.
If I look at the log, the code stop randomly and not in a particular point.

Basically in the FW's loop code does some actions every 4 seconds and it returns to sleep.
I think there is something missing in my sleep function. Could you please check it?

void SAMD_sleep() 
{
    end_debug(); //stop serial.print()

    // Don't fully power down flash when in sleep
    NVMCTRL->CTRLB.bit.SLEEPPRM = NVMCTRL_CTRLB_SLEEPPRM_DISABLED_Val;
    SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk;
    SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
    while(WDT->STATUS.bit.SYNCBUSY);
    __DSB(); // Data sync to ensure outgoing memory accesses complete
    __WFI(); // Wait for interrupt (places device in sleep mode) 
    while(WDT->STATUS.bit.SYNCBUSY);
    SysTick->CTRL |= SysTick_CTRL_TICKINT_Msk;

    start_debug();  ////start serial.print()
}

Is that the problem or there is something related to current spikes or what?

Many thanks

Last Edited: Wed. Apr 29, 2020 - 01:49 PM
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acutone wrote:
it completely stop running

Is the oscillator still running ?

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Hello,

 thanks for answer

I don't know, I'm not able to replicate the problem.

Why shouldn't it running and how could I solve if this is the problem?

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I give more details for completeness. I'm using the following oscillator circuit:

 

I've set a WDT interrupt which awake from sleep every 16 ms. The WDT clock source is the default for Arduino zero and it runs at 32k. 

On another very similar board I don't have this problem and I 've defined the wdt clock as follow:

 

void set_Low_Power_Clock()

{

  // initialize the WDT watchdog timer

  // Setup GCLK for the watchdog using:

  // - Generic clock generator 2 as the source for the watchdog clock

  // - Low power 32khz internal oscillator as the source for generic clock

  //   generator 2.

  // - Generic clock generator 2 divisor to 32 so it ticks roughly once a

  //   millisecond.

  //   2^(divisor register value + 1)

  // A 32khz clock with a divisor of 32 will then generate a 1ms clock period.

  GCLK->GENDIV.reg = GCLK_GENDIV_ID(2) | GCLK_GENDIV_DIV(CK_DIV);  // 4096 Hz with CK_DIV = 2

  // Now enable clock generator 2 using the low power 32khz oscillator and the

  // clock divisor set above.

  GCLK->GENCTRL.reg = GCLK_GENCTRL_ID(2) |

                 GCLK_GENCTRL_GENEN |

                 GCLK_GENCTRL_SRC_XOSC32K |     //32.768kHz Ultra Low-Power Internal Oscillator (OSCULP32K) 

                 GCLK_GENCTRL_DIVSEL;

  while (GCLK->STATUS.bit.SYNCBUSY);  // Syncronize write to GENCTRL reg.

  // Turn on the WDT clock using clock generator 2 as the source.

  GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID_WDT |

                 GCLK_CLKCTRL_CLKEN |          //enable it

                 GCLK_CLKCTRL_GEN_GCLK2;

}

 

Can the default clock source be related to the problem I'm having?