I am using the following circuit except that I am trying different PNP transistors in place of the BSS84 shown (emitter connected to V+).
The signal TB0 is being provided by a 100 kHz low-side PWM LED driver (open collector).
V+ is 12v. R13 has been adjusted to provide the best rise time on TB0 as observed on a scope.
The upper (yellow) trace below is the drive as seen on TB0.
The lower (teal) trace is on the collector - R2 junction of F0 (remember, F0 is now a PNP transistor).
The part actually in use is a MMUN2113LT3G Pre-Biased PNP transistor because I had some on hand. This has an internal 47k emitter-base resistor and a 47k base resistor (Datasheet ).
Notice that the fall of the collector is delayed by about 2 us from the rise of the base signal (100 kHz PWM).
My question is: How can I reduce this turn-off delay? It reduces the effective range of the PWM I can use to about 80% of full range of 100 us.
Perhaps someone can recommend an SOT-23 PNP transistor (~50v CE, ~100 ma) that has a faster turn-off time?
BTW: In this datasheet and others I do not see any references to turn-on or turn-off times as I do for MOSFETs - reason? What datasheet item would one use to select a transistor with fast response time (higher frequency) when running in digital saturation/cutoff use? I see "bandwidth product" - is that something I can use for selection?
My assumption here is that, because I am driving it into saturation, it is taking longer to come out of saturation due to internal C charge storage.
Thanks in advance for your help.