After a few long days I've completed a prototype board. Coming from a PIC16F15323 to the ATTINY1616 I've noticed a few ups and downs.
The peripherals appear to be well thought out with greater configuration than the PIC, but the CLC equivalent having only three inputs is annoying. The pins don't have the same versatility of the PIC, for example TMRDx4 pins are all hard wired.
First question is on the event system and how you're expected to utilise this fully when there's only slots for 6 events?!? Unless I have it wrong timer B types requires input via the event system and only supports sync mode slots, so no sleeping the CPU. This correct? It does say TMRB supports async operation in single shot mode but I'm confused how it'll work in async if the input side for the event system is sync.
Second question is whether it's possible to read Vdd without using another pin. On PIC's the DAC can be set to use Vdd, then it's piped into the ADC which in turn uses Vref and a read is possible. From scouring the datasheet the DAC's on this AVR only support internal Vrefs. The ADC supports Vdd but will max out above the max Vref value (4.4v if I recall correctly).
I may have some further questions but I'll stick them here rather than create new threads all the time.