SAMD21 Timer/Counter datasheet quesiton

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Hello,

Ive setup my Adafruit Metro M0 Express (SAMD21) so ADC samples at 50kHz for 2 channels. And records ADC samples for 0.5 seconds. Since RAM for my chip is low(32Kb of RAM,no where near enough 0.5 seconds worth of data can be stored continously) I incorporated extra SRAM chips. The idea is too use a Timer/Counter(TC) and a ISR and use ping/pong data blocks so I dont lose out on data when writing to SRAM, since it takes time to write a block of data to SRAM.

 

So my questions:

On page 616:   https://cdn.sparkfun.com/datasheets/Dev/Arduino/Boards/Atmel-42181-SAM-D21_Datasheet.pdf

And top of Timer/Counter explanation is page 610........

 

it says on 616:

" When using the TC with the Compare/Capture Value registers (CCx) configured for compare operation, the counter value is continuously compared to the values in the CCx registers. This can be used for timer or waveform operation."

 

Then a few lines down it says:

 

"When using NPWM or NFRQ, the top value is determined by the counter mode. In 8-bit mode, the Period register (PER) is used as the top value and the top value can be changed by writing to the PER register. In 16- and 32-bit mode, the top value is fixed to the maximum value of the counter. "

 

So if I set my TC to a generic clock of 5.33MHz and set it to counter mode 16bit with NFRQ, COUNT register only goes up to 2^16,once it reaches 2^16,it resets to zero. Does this mean 5.33MHz/(2^16) = COUNT range?

 

So if I set my CCx=55 register to 85 counts, a interrupt will only happen every 85 counts compared to COUNT register correct?

 

And my next question would be is there a better way of recording 2 channels @ 50kHz for 0.5 seconds continuously,without losing any data?

 

 

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Total votes: 0

First,you should look at the SAMD21 datasheet documentation

The following is the introduction of NFRQ in the SAM D5x / E5x Family Data Sheet. They should be the same.

 

Normal Frequency Generation (NFRQ)
For Normal Frequency Generation, the period time (T) is controlled by the period register (PER) for 8-bit Counter mode and MAX for 16- and 32-bit mode.

The waveform generation output (WO[x]) is toggled on each compare match between COUNT and CCx, and the corresponding Match or Capture Channel x Interrupt Flag (INTFLAG.MCx) will be set.

 

Normal Frequency Generation (NFRQ)

 

Regarding the last question, sorry, I cannot answer you。

 

Hope these can help you

 

Just code