Overvoltage Protection for AC-DC supply (SMPS)

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This project helps in extending the upper voltage rating of an SMPS (for example, 24V/1A) from 250 Vrms to 380 Vrms while increasing its lowest voltage by about 4V only (for example, 96 Vrms to 100 Vrms).

The protecting circuit is added in series with the SMPS. It acts as an active high-voltage zener in series (this could be seen, on a scope, if the load is resistive) or as a virtual zener in parallel (this could also be seen, on a scope, if the load is an SMPS; the one I tested 24V/1A).

 

I uploaded in ProtSMPS_01.zip:

 

P380V_09_1000V.pdf , Kicad schematic

ProtSMPS_01.asc , LTspice schematic

ProtSMPS_01.plt , LTspice plot, useful when running the simulation

irfp460lc.txt , model of IRFP460 MOSFET

CD4000_v.lib , for CD4093B model

4N35_AL1.asy & 4N35_AL1.asc , model of 4N35 opto coupler

ProtSMPS_01.png , screenshot of LTspice stimulation at 380Vrms

 

Obviously, the size of the heatsink for the power MOSFET depends on the load.

 

Please note that it is just the first version. There will be surely better ways to implement such protection.

 

Kerim

 

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Why have you started a separate thread for this??

 

Surely, it belongs here: https://www.avrfreaks.net/commen...

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I am afraid this is not another thread, here it is a project cheeky

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Oh, I see.

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It's possibly a long forgotten art but the idea of "Projects" on Freaks was actually that you would first post a project (with .zip files etc) to:

 

https://community.atmel.com/projects

 

Then this forum is simply an "announcement" forum to say "hey, there's a new project that does ..."

 

But the whole thing seems to have kind of died so I guess just posting .zips to a thread here works (though it may not be searchable as the Projects section itself was supposed to be).

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This seems like bad news all around...how do you know your power supply doesn't require a sinewave input?  

What if your circuit doesn't balance the avg input to the SMPS to exactly zero?

You are on a solid path to blow the fet gate  (extreme Vgs) if the opto doesn't turn on.

 

You'd  probably do yourself a big favor and get a universal HV input SMPS..there are a zillion varieties and they are cheap!

 

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

Last Edited: Fri. Feb 7, 2020 - 04:31 PM
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On your schematics, ALWAYS have vcc UP and gnd DOWN!   Fix your gate so pin 14 is on top, and pin 7 is on the bottom!!!!!

I did not check but this chip also needs a .1uf (100nf) bypass cap across pins 14 and 7, apologizes if I missed it. 

Jim

 

 

 

 

 

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avrcandies wrote:

This seems like bad news all around...how do you know your power supply doesn't require a sinewave input?

 

What I am sure of is that the available Chinese SMPS supplies, around here, accept all sorts of waveform as long the input voltage exceeds a certain level (and long enough to charge its entry capacitor).

So they don't mind being supplied also by various DC-AC inverters; that is... squarewave, quasi-sinewave (rectangular-wave) and in between smiley

 

avrcandies wrote:

What if your circuit doesn't balance the avg input to the SMPS to exactly zero?

  

The two trimmers which set the level of high voltage clipping also help in balancing this average (to be close to zero). And I agree with you that the temperature sensitivity of a trimmer (of general purpose) is relatively high. But since the resistances of the two trimmers are rather equal, their differential changes with temperature would be of 2nd order.

 

avrcandies wrote:

You are on a solid path to blow the fet gate  (extreme Vgs) if the opto doesn't turn on.

 

In this configuration the gate voltage cannot exceed about 5V. The reason is simple; the gate is always connected to the MOSFET drain via 1 mega resistor. Therefore, long before the drain reaches the 20V (gate limit), the MOSFET turns on and reduces its voltage (in this project). But if you are still worried, a 12V zener diode could be added between gate and source anytime. smiley 

 

avrcandies wrote:

You'd  probably do yourself a big favor and get a universal HV input SMPS..there are a zillion varieties and they are cheap!

 

It seems you have no idea yet where I live exactly and the world's rules cheeky

 

So, I see myself fortunate that the local retailers knew how to brought from abroad power MOSFETs as IRFP640 and opto coupler ICs as PC817... and some standard SMPS sets laugh

 

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ki0bk wrote:

On your schematics, ALWAYS have vcc UP and gnd DOWN!   Fix your gate so pin 14 is on top, and pin 7 is on the bottom!!!!!

 

You are right.

 

ki0bk wrote:

I did not check but this chip also needs a .1uf (100nf) bypass cap across pins 14 and 7, apologizes if I missed it. 

 

You are right too. The 100nF is missing.

But I will not add it... till the first failure of this circuit occurs laugh

 

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Therefore, long before the drain reaches the 20V (gate limit), the MOSFET turns on and reduces its voltage (in this project)

Yes you should add the zener.  You have a good point, but that may fail in case of a large startup surge.  For example if a cap bank causes a very high turn on current surge, some mosfet may still experience a large Vgs surge due to the fet Rds drop.

The FET you use has a +/-30 V Vgs rating, which is pretty good.

  

 

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

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avrcandies wrote:

...but that may fail in case of a large startup surge.

 

You are right. This is why the filtering capacitors (CP1 and CP2 on Kicad schematic or Cp2 and Cp3 on LTspice schematic) were given rather small values deliberately (4u7 and 2u2 respectively). This lets the response of the circuit RC supply be fast enough to avoid such situation and to also protect the SMPS even during the first half cycle of 380Vrms (as seen on ProtSMPS_01.png)

 

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Have you considered that this is ruining the SPMS efficiency?  Also, must ensure the diodes & fet don't waste power.  Note that the sudden jumps in voltage could upset the power supply.  

It's going to be an adventure.

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

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avrcandies wrote:

Have you considered that this is ruining the SPMS efficiency?  Also, must ensure the diodes & fet don't waste power.

 

It is not a NASA project laugh.

By the way, one of the applications for which I needed this protection is to let my controller board of a mains stabilizer (for example, 12 KW, input from 120 to 280 Vrms & output 220V +/- 8V) monitor the mains voltage from 100 to 400Vrms (when the board is supplied by an SMPS available locally).

 

So far, I didn't hear the power supplies (though made in China) complaining in any way... but perhaps it is due to my weak hearing at age 70 smiley