I posted a while ago about an issue I was having with a SAM4S and an APDS9130. The part would work with ANY source other than the SAM4S. After some searching, it turns out that the issue was caused by the down shift on SCL and data transition on SDA being too close to each other <20nS, and the APDS9130 part was (I'm assuming) seeing this as a repeat start condition. To correct the condition, we switched to an Atmel G55, which ~conveniently~ has an offset register to deal with that exact problem.
I'm now revisiting the APDS9130 part in another application, using an ATTINY85. Guess what....SAME EXACT ISSUE. The down clock and data transitions happen near simultaneously, and the APDS9130 will not respond with an ACK when addressed.
My questions to all reading are have you seen this before? Is there a fix for this that I'm not seeing? I can't be the only one to have noticed this.
Thanks for reading.