The ATTiny1614 event system and CCL looks really awesome!
But, I'm struggling a bit to on understanding how to configure it versus the enums I see in iotn1614.h
First anomaly I saw was that iotn1614.h is NOT referenced in avr/io.h -- even after I updated to the latest Studio 7 and installed everything under Device Pack Manager. I mention that, since maybe the header file is not really "ready for prime time".
But, I hacked io.h to add an include iotn1614.h:
#elif defined (__AVR_ATtiny1614__) # include <avr/iotn1614.h>
There are the usual slight discrepancies between how the datasheet spells registers versus what's in the header file. But, I'm really confused by some of the enums, which makes me wonder if I really understand how things work. For example:
/* EVSYS - Event System */ /* EVSYS.ASYNCCH0 bit masks and bit positions */ #define EVSYS_ASYNCCH0_gm 0xFF /* Asynchronous Channel 0 Generator Selection group mask. */ #define EVSYS_ASYNCCH0_gp 0 /* Asynchronous Channel 0 Generator Selection group position. */ #define EVSYS_ASYNCCH00_bm (1<<0) /* Asynchronous Channel 0 Generator Selection bit 0 mask. */ #define EVSYS_ASYNCCH00_bp 0 /* Asynchronous Channel 0 Generator Selection bit 0 position. */ #define EVSYS_ASYNCCH01_bm (1<<1) /* Asynchronous Channel 0 Generator Selection bit 1 mask. */ #define EVSYS_ASYNCCH01_bp 1 /* Asynchronous Channel 0 Generator Selection bit 1 position. */ #define EVSYS_ASYNCCH02_bm (1<<2) /* Asynchronous Channel 0 Generator Selection bit 2 mask. */ #define EVSYS_ASYNCCH02_bp 2 /* Asynchronous Channel 0 Generator Selection bit 2 position. */ #define EVSYS_ASYNCCH03_bm (1<<3) /* Asynchronous Channel 0 Generator Selection bit 3 mask. */ #define EVSYS_ASYNCCH03_bp 3 /* Asynchronous Channel 0 Generator Selection bit 3 position. */ #define EVSYS_ASYNCCH04_bm (1<<4) /* Asynchronous Channel 0 Generator Selection bit 4 mask. */ #define EVSYS_ASYNCCH04_bp 4 /* Asynchronous Channel 0 Generator Selection bit 4 position. */ #define EVSYS_ASYNCCH05_bm (1<<5) /* Asynchronous Channel 0 Generator Selection bit 5 mask. */ #define EVSYS_ASYNCCH05_bp 5 /* Asynchronous Channel 0 Generator Selection bit 5 position. */ #define EVSYS_ASYNCCH06_bm (1<<6) /* Asynchronous Channel 0 Generator Selection bit 6 mask. */ #define EVSYS_ASYNCCH06_bp 6 /* Asynchronous Channel 0 Generator Selection bit 6 position. */ #define EVSYS_ASYNCCH07_bm (1<<7) /* Asynchronous Channel 0 Generator Selection bit 7 mask. */ #define EVSYS_ASYNCCH07_bp 7 /* Asynchronous Channel 0 Generator Selection bit 7 position. */
As I read the attiny1614 spec, there are 13 peripherals (n= 0 to n=12) that can have inputs from the ASYNC generators. Each of those event "consumers" has a dedicated register that defines which event channel that peripheral should use as an input (the values SYNCCH0, SYNCCH1, ASSYNCCH0, etc):
So, for example, say I want TCB0 to have its input from an event channel 0. I assume I do this:
EVSYS.ASYNCUSER0 = EVSYS_ASYNCUSER0_ASYNCCH0_gc;
Since this is in iotn1614.h:
typedef enum EVSYS_ASYNCUSER0_enum
{
EVSYS_ASYNCUSER0_OFF_gc = (0x00<<0), /* Off */
EVSYS_ASYNCUSER0_SYNCCH0_gc = (0x01<<0), /* Synchronous Event Channel 0 */
EVSYS_ASYNCUSER0_SYNCCH1_gc = (0x02<<0), /* Synchronous Event Channel 1 */
EVSYS_ASYNCUSER0_ASYNCCH0_gc = (0x03<<0), /* Asynchronous Event Channel 0 */
EVSYS_ASYNCUSER0_ASYNCCH1_gc = (0x04<<0), /* Asynchronous Event Channel 1 */
EVSYS_ASYNCUSER0_ASYNCCH2_gc = (0x05<<0), /* Asynchronous Event Channel 2 */
EVSYS_ASYNCUSER0_ASYNCCH3_gc = (0x06<<0), /* Asynchronous Event Channel 3 */
} EVSYS_ASYNCUSER0_t;I think the command is setting up user0 (Timer B0) to use Asynchrouse event channel 0.
But, I also see this in iotn1614.h:
/* EVSYS.ASYNCUSER0 bit masks and bit positions */ #define EVSYS_ASYNCUSER0_gm 0xFF /* Asynchronous User Ch 0 Input Selection - TCB0 group mask. */ #define EVSYS_ASYNCUSER0_gp 0 /* Asynchronous User Ch 0 Input Selection - TCB0 group position. */ #define EVSYS_ASYNCUSER00_bm (1<<0) /* Asynchronous User Ch 0 Input Selection - TCB0 bit 0 mask. */ #define EVSYS_ASYNCUSER00_bp 0 /* Asynchronous User Ch 0 Input Selection - TCB0 bit 0 position. */ #define EVSYS_ASYNCUSER01_bm (1<<1) /* Asynchronous User Ch 0 Input Selection - TCB0 bit 1 mask. */ #define EVSYS_ASYNCUSER01_bp 1 /* Asynchronous User Ch 0 Input Selection - TCB0 bit 1 position. */ #define EVSYS_ASYNCUSER02_bm (1<<2) /* Asynchronous User Ch 0 Input Selection - TCB0 bit 2 mask. */ #define EVSYS_ASYNCUSER02_bp 2 /* Asynchronous User Ch 0 Input Selection - TCB0 bit 2 position. */ #define EVSYS_ASYNCUSER03_bm (1<<3) /* Asynchronous User Ch 0 Input Selection - TCB0 bit 3 mask. */ #define EVSYS_ASYNCUSER03_bp 3 /* Asynchronous User Ch 0 Input Selection - TCB0 bit 3 position. */ #define EVSYS_ASYNCUSER04_bm (1<<4) /* Asynchronous User Ch 0 Input Selection - TCB0 bit 4 mask. */ #define EVSYS_ASYNCUSER04_bp 4 /* Asynchronous User Ch 0 Input Selection - TCB0 bit 4 position. */ #define EVSYS_ASYNCUSER05_bm (1<<5) /* Asynchronous User Ch 0 Input Selection - TCB0 bit 5 mask. */ #define EVSYS_ASYNCUSER05_bp 5 /* Asynchronous User Ch 0 Input Selection - TCB0 bit 5 position. */ #define EVSYS_ASYNCUSER06_bm (1<<6) /* Asynchronous User Ch 0 Input Selection - TCB0 bit 6 mask. */ #define EVSYS_ASYNCUSER06_bp 6 /* Asynchronous User Ch 0 Input Selection - TCB0 bit 6 position. */ #define EVSYS_ASYNCUSER07_bm (1<<7) /* Asynchronous User Ch 0 Input Selection - TCB0 bit 7 mask. */ #define EVSYS_ASYNCUSER07_bp 7 /* Asynchronous User Ch 0 Input Selection - TCB0 bit 7 position. */
I don't see how those those bit position and bitmasks would be used. The first enum (EVSYS_ASYNCUSER0_enum) has the only valid values indicated in the spec.
So, either this is just nonsense in the header file, or I'm missing something (probably the latter).
Also, the enum CCL_INS0_enum:
/* LUT Input 0 Source Selection select */
typedef enum CCL_INSEL0_enum
{
CCL_INSEL0_MASK_gc = (0x00<<0), /* Masked input */
CCL_INSEL0_FEEDBACK_gc = (0x01<<0), /* Feedback input source */
CCL_INSEL0_LINK_gc = (0x02<<0), /* Linked LUT input source */
CCL_INSEL0_EVENT0_gc = (0x03<<0), /* Event input source 0 */
CCL_INSEL0_EVENT1_gc = (0x04<<0), /* Event input source 1 */
CCL_INSEL0_IO_gc = (0x05<<0), /* IO pin LUTn-IN0 input source */
CCL_INSEL0_AC0_gc = (0x06<<0), /* AC0 OUT input source */
CCL_INSEL0_TCB0_gc = (0x07<<0), /* TCB0 WO input source */
CCL_INSEL0_TCA0_gc = (0x08<<0), /* TCA0 WO0 input source */
CCL_INSEL0_TCD0_gc = (0x09<<0), /* TCD0 WOA input source */
CCL_INSEL0_USART0_gc = (0x0A<<0), /* USART0 XCK input source */
CCL_INSEL0_SPI0_gc = (0x0B<<0), /* SPI0 SCK source */
} CCL_INSEL0_t;The enum doesn't include all the values for AC1, TCB1, and AC2. I'm assuming the spec is correct and the enum is outdated.
