I am currently developing a device which uses a 328P as SPI slave. For testing purposes, I created a simple program:
#include <avr/io.h>
#include <avr/interrupt.h>
volatile uint8_t last_send = 0;
int main() {
sei();
// Set MISO to output mode
DDRB |= (1 << DDB4);
// Set debug pin to output mode
DDRD |= (1 << DDD2);
// Start SPI
SPCR = (1 << SPE);
uint8_t at = 0;
while (1) {
SPDR = at++;
PORTD = ~PORTD; // (2)
while (!(SPSR & (1 << SPIF)));
}
}While this code does indeed work flawlessly, looking at the timing, it appears that there is very little time between an output toggle (2) and the next transmitted byte, more specifically around 83ns.
That creates two issues:
- Going anywhere above 500kHz clock frequency with the master will result in garbage data reception
- I fear that when adding some interrupts for the actual logic, that might take too long and also result in garbage data reception
Is there any way to increase that duration?
