Hello,
Could anybody explain me how to set the ADC to make it triggered by event chanel 0? I know that it should be set as follows:
- EVCTRL register, EVSEL bits -> event channel 0
- EVCTRL register, EVACT bits -> CH0 or... SYNCSWEEP?
What do we use SYNCSWEEP for? Robert
SWEEP is a feature on other XMEGA with multiple ADC channels. You can ignore SYNCSWEEP on the XMEGA E.
Are you sure? There is the SYNCSWEEP option in the Xmega E-series datasheet (ADC register description)...robiw
What do we use SYNCSWEEP for? Robert
It is written in manual. E.g. "ADC is flushed and restarted for accurate timing"
Please see section 25.13 Synchronous Sampling.
It explains that there may be an undefined delay between trigger event and real measurement.
P.S. I don't think it is really useful
So... to have the ADC triggered synchronously (by CH0 event) I should use bit SYNCSWEEP? Yes? r
Simply put, next ADC conversion will not start until previous is finished.
If you use SYNCSWEEP, if current conversion is running, it will be aborted to provide more or less defined delay (2-3 CPU clocks) between trigger and conversion.
If your event signal is slow enough, there is no difference
Sampling freq = 32kHz. So i don't know what to set? r
Bit name if totally misleading. SWEEP is taken form other ADC models with several channels, and SYNC is not clear enough.
Names should be something like WAIT_CURRENT_CONVERSION and ABORT_CURRENT_CONVERSION
Sampling freq = 32kHz. So i don't know what to set? r
Use CH0.
But when I use the SYNCSWEEP option three will be predictible delay between trigger and conversion, right? I think it is important to have the same time between each conversion. R
Once again. There is a predictable delay between trigger and conversion in any case. But if you start next conversion before previous one has completed, you will get a delay.
SYNCSWEEP bit gives you an option to terminate current conversion or wait until it is finished, provided that you trigger too fast. So it is up to you to decide which one to use.
Please note, that if frequency of your trigger if higher that conversion speed and SYNCSWEEP is active, you will not get any result at all.
As I previously mentioned my sampling freq od 32kHz while the ADC clock is 500kHz. So the ADC will be able to finish one conversion until the next is triggered. The ADC conversion is triggered by ch0 event system and event system is powered by timer overflow. R
