Xmega E-series definitions...

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Hi everyone,

I've noticed there is no registers definitions regarding xmega16e5.

I couldn't find

 

CTRLB -> TRNINTLVL[1:0]

 

and SRCADDCTRL register definitions. Do you have them? R

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What IDE / toolchain ?

 

EDIT

 

Does Atmel START have anything?

 

https://www.microchip.com/mplab/avr-support/atmel-start

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Last Edited: Wed. Nov 20, 2019 - 10:51 AM
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Eclipse with Atmel toolchain..r

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robiw wrote:
Eclipse with Atmel toolchain..r

So AVR-GCC, then?

 

 

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To write the TRNINTLVL bits you would do something like this:

 

// Write EDMA CH0 TRNINTLVL to Low level
// By OR'ing I'm assuming it was OFF
EDMA.CH0.CTRLB |= EDMA_CH_TRNINTLVL_LO_gc;

 

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More generally just grep the io<model>.h file for "TRNINTLVL" or whatever.

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Therre are my settings:

        

//Enable and configure DMA
        EDMA.CTRL =
                                    EDMA_ENABLE_bm|  //EDMA Enabled
                                    EDMA_CHMODE_STD02_gc|  //Channels 0 and 2 in standard configuration
                                    EDMA_DBUFMODE_DISABLE_gc|  //No double buffer enabled
                                    EDMA_PRIMODE_RR0123_gc;  //Round robin on all channels

        EDMA.CH0.ADDRCTRL =
                                    EDMA_CH_RELOAD_BURST_gc|  //Reload at end of each burst transfer
                                    EDMA_CH_DIR_INC_gc;  //Increment

        EDMA.CH0 = ADCA.CH0RES;  //Channel Source Address for Standard Channels

        EDMA.CH0.DESTADDRCTRL =
                                     //Reload at end of each transaction
                                    EDMA_CH_DESTDIR_INC_gc;  //Increment

        EDMA.CH0.DESTADDR = (uint16_t) Buffer; //Channel Destination Address for Standard Channels

        EDMA.CH0.TRFCNT = sizeof(Buffer);  //Channel Block Transfer Count for Standard Ch.
        EDMA.CH0.TRIGSRC = EDMA_CH_TRIGSRC_ADCA_CH0_gc;  //ADCA CH0 as trigger

        EDMA.CH0.CTRLA =
                                    EDMA_CH_ENABLE_bm|  //Channel Enabled
                                    EDMA_CH_SINGLE_bm|  //Channel Single Shot Data Transfer
                                    EDMA_CH_BURSTLEN_bm;  //Channel 2-bytes Burst Length

        EDMA.CH0.CTRLB = EDMA_CH_TRNINTLVL1_bm;  //High level Interrupt

        //Now, we enable int high level
        PMIC.CTRL = PMIC_HILVLEN_bm;
        sei();

 

robiw

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There are no _gc (control group) definitions for the DESTADDRCTRL register. There are only INC/DEC definitions but lack of BLOCK/TRANSACTION etc. definitions. Do you have the same? robiw

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robiw wrote:
There are no _gc (control group) definitions for the DESTADDRCTRL register.
You sure about that. In the datasheet I see:

 

so I grepped the iox32e5.h file for "TRANSACTION" (the more obscure search term there) and found:

 

 

right above that there is also:

 

 

I guess I could have just grepped for DESTRELOAD and/or DESTDIR and found those that way too.

Last Edited: Thu. Nov 21, 2019 - 12:15 PM
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Which toolchain version do you use? r

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I have only found something like this:

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Perhaps you also need to state which toolchain & version you are using.

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I'm building with:

 

 

Actually the 1.2.51 pack for XmegaE might be well out of date as I don't use Xmega and have not updated the packs for ages. Perhaps this is something that was removed from iox32e5.h at some later stage?? (though it seems more likely your toolchain is out of date).

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I have downloaded the newest avr-8 bit toolchain from Atmel and searched iox32e5.h file. There are no such definitions as below...robiw

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That is the iox32e5.h you get if you install AS7 on Windows.

 

The 1.2.51 pack also seems to be the latest download for E5 at:  http://packs.download.atmel.com/

 

EDIT: if you download that it may have an ".atpack" extension but it's really just a .zip so treat it as such, amongst other things it contains:

 

Last Edited: Thu. Nov 21, 2019 - 02:14 PM
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Hmmm ... unhelpfully, Atmel didn't put any version information in the header comment:

/*****************************************************************************
 *
 * Copyright (C) 2017 Atmel Corporation, a wholly owned subsidiary of Microchip Technology Inc.
 * All rights reserved.
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *   http://www.apache.org/licenses/LICENSE-2.0
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 ****************************************************************************/

frown

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Presumably for reasons of not polluting their revision control system?

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I looked at iox32e5.h file and find as follows:

 

/* Memory Address Reload for Peripheral Ch., or Source Address Reload for Standard Ch. */
typedef enum EDMA_CH_DESTRELOAD_enum
{
    EDMA_CH_DESTRELOAD_NONE_gc = (0x00<<4),  /* No reload */
    EDMA_CH_DESTRELOAD_BLOCK_gc = (0x01<<4),  /* Reload at end of each block transfer */
    EDMA_CH_DESTRELOAD_BURST_gc = (0x02<<4),  /* Reload at end of each burst transfer */
    EDMA_CH_DESTRELOAD_TRANSACTION_gc = (0x03<<4),  /* Reload at end of each transaction */
} EDMA_CH_DESTRELOAD_t;

They wrote "Source Address Reload for Standard Ch." and typed "DESTRELOAD".... source mixed with dest...robiw

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robiw wrote:
I looked at iox32e5.h file and find as follows:
Not sure of the point you are making. Are you saying that somehow these _gc's are not suitable for setting the DESTRELOAD field in the DESTADRCTRL rehister ?? Surely that's what they exist for?

 

Or are you simply recognizing that the same bit groups would work in the ADDCTRL register too? (none/block/burst/transaction are also bit [5:4] in that reg too).

Last Edited: Thu. Nov 21, 2019 - 03:32 PM
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I only meant that the comment "Source Address Reload for Standard Ch" doesn't match the "_DESTADDR_". Should be ""Destination Address Reload for Standard Ch"". For the ADDRCTRL there are _RELOAD_ definitions... robiw

Last Edited: Thu. Nov 21, 2019 - 04:26 PM
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1.2.51 has a successor :

https://packs.download.microchip.com/#collapse-Microchip-XMEGAE-DFP-pdsc

...

2.0.2 (2019-01-24)

... Succeeds Atmel.XMEGAE_DFP 1.2.51.

due to

Atmel Studio Release Note

[page 3]

Atmel Studio 7.0.2389

...

Inclusion of the Most Recent Device Family Packs Included in Installer as of Sept. 2019. Use the Device Pack Manager to Check for Updates to get the Newest Device Support, or to Download an Older Device Family Pack for Legacy Support.

...

 

"Dare to be naïve." - Buckminster Fuller

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Yes, the Microchip.XMEGAE_DFP 2.0.2 succeeds the Atmel.XMEGA_DFP 1.2.51, but because of "reasons" the Microchip DFP doesn't work in Studio.

 

Generally speaking Atmel DFPs (from http://packs.download.atmel.com/) are for Studio and Microchip DFPs (from https://packs.download.microchip...) are for MPLAB X.

The content of the latest version of Atmel and Microchip DFPs should be similar, they are built using the same sources. Both DFPs will be updated if necessary. The "succeeds"-comment just tells you where the Microchip DFP branched off the Atmel DFP.

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The MPLABX pack also seems to contain:

/* Memory Address Reload for Peripheral Ch., or Source Address Reload for Standard Ch. */
typedef enum EDMA_CH_DESTRELOAD_enum
{
    EDMA_CH_DESTRELOAD_NONE_gc = (0x00<<4),  /* No reload */
    EDMA_CH_DESTRELOAD_BLOCK_gc = (0x01<<4),  /* Reload at end of each block transfer */
    EDMA_CH_DESTRELOAD_BURST_gc = (0x02<<4),  /* Reload at end of each burst transfer */
    EDMA_CH_DESTRELOAD_TRANSACTION_gc = (0x03<<4),  /* Reload at end of each transaction */
} EDMA_CH_DESTRELOAD_t;