Mega4809 Configurable Custom Logic (CCL) block?

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Greetings, folks

 

Trying to wrap my head around this feature of the AVR0 chips. Have never used any programmable logic so its all new. In particular, I don't know how to translate the lookup table system in something real. Yes, I have read "TB3218 Getting Started with CCL" and that helps a little but only a little.

 

For example, I wonder if I can implement an SPI hardware interface with it? It does not appear to have more than a few 1-bit flip-flops but maybe there is a way using its interface register?

 

Your thoughts on what the strengths and weaknesses of this thing are? What sort of things could it be "good at"?

 

Thanks

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

Last Edited: Wed. Nov 13, 2019 - 07:22 PM
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>For example, I wonder if I can implement an SPI hardware interface with it?

 

Cannot answer your main question, but the usarts have a master spi mode, and you have at least 3 usarts in a mega0, 4 in the 40/48 pin device, in addition to the single spi.

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Ahh, yes. Forgot about that detail. Thanks.

 

But, I would still be interested in thoughts about capabilities of the CCL.

 

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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ka7ehk wrote:
What sort of things could it be "good at"?
Enhancing UART and USART though CCL doesn't have the counters that XCL has.

Atmel AT01084: XMEGA E Using the XCL Module

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5. Example of XCL Application: Variable Frame Length

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6. Example of XCL Application: Signal Encoding

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via ATxmega32E5 - 8-bit PIC Microcontrollers

E5's XCL doing 2Mbps(!!!) FSK, appnote to follow | AVR Freaks

 

"Dare to be naïve." - Buckminster Fuller

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Thanks -

 

Had not made the connection with XCL yet.

 

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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I've used the CCL on the tinys (only 2 lookup tables) for basic stuff.

 

One design used it to output USART TX signal inverted on a pin for a poor-man's RS422 transmitter.

 

Another design used it to duplicate the TWI clock so there was an upstream input and a gated downstream output. This allowed slave to be added to the bus one at a time based on position. Only works with single master, not multi-master.

 

 

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Thanks

 

That is starting to fill in the picture.

 

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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When I wrote in msg #1:

It does not appear to have more than a few 1-bit flip-flops

I understood things even less than now. I have just realized that these "flip-flops" were really logic implementations using the sequencer. So, there are no actual "flip-flops" in the CCL, it seems. Just wanted to add this in case some other newbie stumbles across this; did not want incorrect "information" left scattered around.

 

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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The CCL can only do rather simple things, like redirecting/duplicating signals from peripherals or inputs, with or without inversion, or simple multiplexing, for example, you can direct either of two inputs to an output, based on a third input.

It can be combined with the event system to achieve slightly more complicated functionality.

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Thanks for that observation. That is sort of what I was starting to conclude.

 

Cheers

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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The CCL is only a couple of gates worth - not nearly enough to implement the 8bit shift registers you'd need to implement something like SPI.  You can do any combinatorial function of 3 inputs (where have additional circuitry to select where those inputs come from), plus stuff with the filter, edge detector, and sequencer.

You can use one to do Manchester encoding of your Synchrnous USART output, for example.  (There's even an App Note.  I'm not sure about decoding; that's a bit more complex, apparently.)  Another application that is PROBABLY possible is the sort of high-speed handshake that you sort-of need to implement something like a priner port "receiver" - when you get a "data available" strobe, you should immediately assert the busy handshake to hold off the next data byte.  PROBABLY more "immediately" than you could do with software, but within the specs of the CCL.

There are apparently a fair number of applications that are ALMOST in reach of a microprocessor, but end up needing you to add some nand gates, or an XOR, or a flip-flop, external to the micro.  The CCL is supposed to replace those extra chips (at "reduced manufacturing costs."  Theoretically.)

 

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Here is a nice visual guide...give it a try...it lets you visualize various connections...if you want to add "flip flops"  select sequentioal logic options

 

https://hackaday.io/project/134831-atmega4809-developing-board-project/log/144552-how-to-start-configurable-custom-logic-on-atmega4809

 

here is a nice detailed exaplanation...in it, they mention a quadrature decoder can be made using CCL & is avail in start.

 

http://ww1.microchip.com/downloads/en/AppNotes/DS00002451B.pdf

 

One for the similar pic cousin...has a list of typical uses & various application examples:

http://ww1.microchip.com/downloads/en/Appnotes/AN2912-Using-CLCs-in-Real-Time-Apps_00002912A.pdf  

 

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

Last Edited: Thu. Nov 14, 2019 - 05:31 PM
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Thanks for the fill-ins. They really do help.

 

Cheers

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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The CCL seems to a little more than pure logic, as the sequencer has state.  I think the sequencer design would be cleaner with a table (register) giving output based on two inputs and one state, analogous to the three inputs of the "truth table logic".

 

I also wonder if this could be used for switch debounce.

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ka7ehk wrote:

... It does not appear to have more than a few 1-bit flip-flops but maybe there is a way using its interface register?

Your thoughts on what the strengths and weaknesses of this thing are? What sort of things could it be "good at"?

SPI is going to be too complex, but CCL blocks can be useful for pin-remapping, and also useful for one-shot type gating, where the interrupts have too much jitter.

I think you can do manchester encode/decode type level of operations, which is what your  "few 1-bit flip-flops" suggests.

 

 

 

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'Tis not clear to me whether this logic is synchronous or asynchronous. Or, given the range of inputs, maybe it does not matter? E.g. I don't see anything as an input that is asynchronous. More significant, maybe, is whether or not additional delays are present.

 

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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Give a try of the hackaday start demo steps, mentioned earlier...it gives a better picture of all the options

 

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

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ka7ehk wrote:

'Tis not clear to me whether this logic is synchronous or asynchronous. Or, given the range of inputs, maybe it does not matter? E.g. I don't see anything as an input that is asynchronous. More significant, maybe, is whether or not additional delays are present.

 

Check the "Filter" section.   I read it as either asynchronous (unfiltered) or synchronous with delays.

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Thanks, on that!

 

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net