AVR core for FPGA

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The other day I thought it would be neat to develop an open-source AVR core clone for an FPGA. Perhaps even some AVR chip clones including the peripherals. Could get intersting with the possibility of executing program from RAM, an other sorts of flexibilities afforded by having direct access to the internal CPU design.

Of course actually doing such a thing would be way over my head, at least for the next 10 years, depending on how good I might ever get at PLDs.

So I figured I'd ask here about this, since I'm sure the idea has also been pondered by others. Any projects or plans under way? It would also be a great thing for building cheap AVR emulators, and putting the 3rd party tools folks out of business. Maybe they won't be too eager to support such a project.

Just a thought.

Good day!

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A commercial AVR soft core already exists that runs at high frequencies (50Mhz?), but IIRC it's pretty big and prob won't fit in a CPLD. FPGAs should be fine, but I don't know if it uses any Atmel AT40K (or Xilinx XC4k) primitives. It would be non-trivial to implement an ADC or anything in the analog domain without spinning a custom ASIC. I wish they could integrate some programmable logic/analog peripheral blocks like in the Cypress PSoC series.

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It might be easier to uase something like VHDL to synthesise a custom core, rather than following an existing design, especially if you have a particular application in mind. Then, you can make it as light as you like by omitting the instructions you don't need.

You could make the instruction codings very similar to the AVR core, though, and either use a subset of the assembler or run the resulting .hex file through a converter on the way out.

Atmel already do a gate array with a AVR core bolted on - FPSLIC.

Sean.

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As well there are software packages that help you create your own micros. ARC International (http://www.arc.com/) is one vender, Tensilica (http://www.tensilica.com/) is another.

There are a lot of freely avalible CPU cores around, many at www.opencores.org

-Colin

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if an AVR core is being developed for an FPGA, what needs to be done to implement the Program space on an SD card? 

 

-N2 

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A lot has transpired in the 17 years since this thread was started. There is at least one implementation of an AVR for fpgas. As to why in this day and age you’d want such a thing as there are much more powerful micros available. Just today i got an email for a microcontroller dev board for usd $10.10 which clocks at 500MHz. That could emulate the AVR easily. You want the code on a sdcard? Easy.

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To fetch from SD are you suggesting that the program is in a "file" on the SD or just an allocated area of raw sectors?

 

Anyway the way it would work (once you've located each 512 byte sector) is that you'd need to initiate the SPI commands to read that sector and hold it in a 512 byte RAM buffer in the FPGA and then do the opcode fetches from that. So actually, during development, you don't need the SD bit at all. Simply hold the test program in the FPGA and then block move it from NVM to RAM and then run the core.

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microcontroller dev board for usd $10.10 which clocks at 500MHz.

That's mighty fast LED blinking!   It's amazing how much the capabilities go up in a decade, while the price goes down!  I wonder if is even worthwhile to use an AVR core, when others are readily available?  I suppose it would be comparatively small, compared to others, leaving more room for other logic in a small (low cost) FPGA.

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

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clawson wrote:
SPI commands 

Or, as it's an FPGA, use the full 4-bit interface...

 

avrcandies wrote:
I wonder if is even worthwhile to use an AVR core, when others are readily available?

Indeed!

 

  I suppose it would be comparatively small, compared to others

Hmmm ... I think all the main vendors have their own (possibly free) "small microcontroller" IP - which would be optimised for their own devices.

 

 

 

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clawson wrote:
... the SPI commands ...
That's what Clifford Wolf, creator of IceStorm, has for his RISC-V though QSPI from flash instead of SD.

https://github.com/cliffordwolf/picorv32/blob/master/picosoc/overview.svg

from picorv32/picosoc at master · cliffordwolf/picorv32 · GitHub

via https://github.com/riscv/riscv-cores-list#soc-platforms

 


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