AVR Freaks

You can use 74HC74 to count down signals as high as 45MHz down to a few MHz. It would take several and the signal would have to be amplified to logic levels, but I've used the scheme several times.

 

If you count down by 32 (5 counters in cascade), then to resolve 100KHz (0.1MHz), you would need a resolution of 100/32 = 3.125KHz. You would need a crystal for the MCU to get that accuracy. You can also use 74HC inverters biased into linear mode with a feedback resistor and an input coupling capacitor to get the signal amplitude to clock the 74HC74s.

 

Jim

Under-sampling though an anti-aliasing filter must exist along with an accurate sampling clock.

Oscilloscope Systems and Controls | Tektronix

[nearly mid-page, after Figure 27]

If the sample rate isn’t fast enough, high-frequency components can “fold down” into a lower frequency, causing aliasing in the display, as demonstrated in Figure 28.

[edit : scroll down to Equivalent-time Sampling Method]

Convolution | The Scientist and Engineer's Guide to Digital Signal Processing

https://en.wiktionary.org/wiki/convolution#Noun

 

Could try "folding" by your oscilloscope to see what results; a scope may have a 20MHz bandwidth limiter (a lot of anti-aliasing filter)

 

Never done it, but it is 2019 not 1999.  A Cortex-M at about 400MHz?  I'd guess there are corresponding capture facilities.

 

How do you ensure a clean 30MHz signal, sparkies?

 

lol -- hook it to a radio with appropriate band, and scan for the noise.

OP didn't really give us a range, just the 30MHz max.  So, say 1MHz - 30MHz -- will your BPF have good characteristics over that range?  How will you make it so that a chip's counter unit will reliably count the edges?  With more modest signals our designer uses one or two Schmitt trigger stages.  Good up to 30MHz?

 

 

I'm not a Cortex person, but a bit of Google work came up with

LPC1768 Timer Input Capture & Frequency Counter Tutorial

http://www.ocfreaks.com/lpc1768-...

 

...where it appears that one can use "timer as counter" pretty much like on AVR8?

 

... In Counter Mode, external signal is used to increment TC every time an edge(rising/falling/both) is detected. This behavior is configured using CTCR. Corresponding bits for Capture channel must be set to zero in CCR. ...

 

... The maximum input signal frequency which can be reliably measured using first method ["gating"] is half of TIMERn_PCLK, since it takes two successive edges of TIMERn_PCLK to detect one edge of external signal. Hence, using a TIMERn_PCLK of 100Mhz we can measure upto 50Mhz signal properly.

That model is an M3.  I'd guess the same facilities are on less expensive models as well?  e.g. LPC1111 M0 at a couple bucks and two 32-bit timers with counter capability.  .  Anyway, with a clean signal and that tutorial the job is done.  As discussed, one would struggle a bit to do it on an AVR8.  lol -- if one is adding external counter circuitry anyway as laid out above, make the external circuitry be a Cortex. 

 

Cliff and I had roughly the same comments on the same topic in 2013

https://www.avrfreaks.net/forum/...

 

 

 

 

So if you down-convert, then can't you use the AVR as originally proposed?

 

Can you still reach OP's desired resolution of 0.1MHz on a 30MHz signal, about 3%, after down-converting?