ATTINY416/816 Brown Out Detector

Log in or register to post comments
Go To Last Post
6 posts / 0 new
Author
Message
strontiumdog
strontiumdog's picture
Level: Wannabe
Joined: Wed. May 23, 2012
Posts: 53 View posts
#1
Posted by strontiumdog: Sun. Jun 23, 2019 - 03:34 AM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

The Complete datasheet says about the Brown out detector threshold of the ATTINY 416/816:

 

If the BOD/VLM is enabled in sampled mode, only VLMCFG=0x1 (crossing threshold from above) in
BOD.INTCTRL will trigger an interrupt.

 

OK, but then VLMCFG says:

 

Bits 2:1 – VLMCFG[1:0]: VLM Configuration
These bits select which incidents will trigger a VLM interrupt.
Value
0x0 - Voltage crosses VLM threshold from above
0x1 - Voltage crosses VLM threshold from below
0x2 - Either direction is triggering an interrupt request
 

So which is it?

 

Is it that You only get an IRQ in sampled mode when VLMCFG is 0 (Contradictory to first statement) OR

When VLMCFG is 1, which is a threshold from below IRQ (Also Contradictory to first statement).

 

Also, which ever way it is, if the VLMCFG is 0x2, will one still get the IRQ for crossing the threshold in the appropriate direction, in sampled mode, OR does it need to be 0x1 ONLY to function in sampled mode.

 

My hope is that its actually IRQ crossing from Below, because an IRQ crossing from above in sampled mode is pretty useless.

Tags:

AVR Microcontrollers, megaAVR and tinyAVR
Top
kabasan
kabasan's picture
Level: Hangaround
Joined: Mon. May 22, 2017
Posts: 441 View posts
Location: Japan
Posted by kabasan: Mon. Jun 24, 2019 - 02:32 AM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

I was interested in it so I saw it on a real device. The chip I used is tiny1616.
Apparently VLMCFG is not working. The actual operation was the following two types no matter what setting.

 

In BOD_ACTIVE_ENABLED:
Either direction is triggering an interrupt request. It can be released by writing 1 to the interrupt flag.

 

In BOD_ACTIVE_SAMPLED:
Interrupts are always set at voltages lower than VLMLVL, and can not be stopped until recovery to VLMLVL or higher.
 

Top
strontiumdog
strontiumdog's picture
Level: Wannabe
Joined: Wed. May 23, 2012
Posts: 53 View posts
Posted by strontiumdog: Mon. Jun 24, 2019 - 08:10 AM (Reply to #2)
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Wow, thats weird behaviour.  The sampled operation is completely broken. 

 

The reason for using sampled would be to wake up when you go from battery to DC supply and consume as little current as possible in the mean time, which is what I want to use it for.  Generating interrupts constantly will totally screw up any power efficiency.  May as well just clock the whole chip at 32khz and read the power line with an A2D.  Which isn't power efficient, but would be better than constant BOD interrupts bringing you out of sleep.

 

For example, BOD in continuous mode is stated to consume 19uA, whereas sampled is 1.2uA  A huge decrease in power.

 

I will wait till i get real hardware to test on to replicate your test, but that just seems useless.

Top
Moe123
Moe123's picture
Level: Resident
Joined: Tue. Aug 7, 2018
Posts: 680 View posts
Posted by Moe123: Mon. Jun 24, 2019 - 02:01 PM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0


strontiumdog wrote:
For example, BOD in continuous mode is stated to consume 19uA, whereas sampled is 1.2uA  A huge decrease in power.

 

This is because the BOD sleeping time at the continous mode is 7us whereas the sleeping time in sampling mode at@1kHz is 1 ms & @125kHz is 8 ms so this is a huge difference. check page 424 from the datasheet:

http://ww1.microchip.com/downloa...

 

also you have to put into consideration the wakeup time (Tstart ~ Start-up time) which is 40us, during this time the driver is initialized...etc

 

Here are some screenshots to help you understanding:

 

 

Page 446 & Page 464.

 

Regards,

Moe

 

Top
Moe123
Moe123's picture
Level: Resident
Joined: Tue. Aug 7, 2018
Posts: 680 View posts
Posted by Moe123: Mon. Jun 24, 2019 - 02:08 PM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

strontiumdog wrote:
May as well just clock the whole chip at 32khz and read the power line with an A2D.

 

Not true, I tried this before, the thing is the ADC in these attiny 1 series requires a minimum certain frequency to get the exact results and to make results ready.

 

From datasheet:

" Conversion timing: A normal conversion takes 13 CLK_ADC cycles. The actual sample-and-hold takes place 2 CLK_ADCcycles after the start of a conversion. "

 

so if you are running continously at 32KHz aka ULP even during the conversion then you will either get wrong ADC results or the results will not occur at all. thats why I suggest when you are make the chip wake up to switch to run atleast at 4 MHz or better 5MHz...make your calculation and go back to sleep and to make this happen you may use the PIT in the RTC. RTC requires a lower power consumption than many other drivers. ofcurse the time is not totally accurate but it will do the job.

 

Regards,

Moe

Last Edited: Mon. Jun 24, 2019 - 02:09 PM
Top
strontiumdog
strontiumdog's picture
Level: Wannabe
Joined: Wed. May 23, 2012
Posts: 53 View posts
Posted by strontiumdog: Mon. Jun 24, 2019 - 11:39 PM
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Moe123 wrote:

strontiumdog wrote:
May as well just clock the whole chip at 32khz and read the power line with an A2D.

 

so if you are running continously at 32KHz aka ULP even during the conversion then you will either get wrong ADC results or the results will not occur at all. thats why I suggest when you are make the chip wake up to switch to run atleast at 4 MHz or better 5MHz...make your calculation and go back to sleep and to make this happen you may use the PIT in the RTC. RTC requires a lower power consumption than many other drivers. ofcurse the time is not totally accurate but it will do the job.

 

Regards,

Moe

 

Hi Moe,

 

Yes, I understand that the ADC needs a minimum clock, my point was, that getting CONTINUOUS interrupts from the sampled mode of the BOD, would probably be far worse from a power perspective, than sampling the ADC periodically under control of the CPU.  Which is crazy.  The whole reason for the BOD is to detect low power states.  IDEALLY It should be possible to stay asleep and let the battery hold up your RTC and RAM, and wake up when power rises, but if the BOD is working as described here, then that is impossible.

Top