AVR Freaks

Well, if you don't have access to anything, I guess you will have to put some kind of buffer between the devices.

That is: Master -> delay -> Slave / Slave -> no delay -> Master

That tells me that the excess master delay is tied to the baud rate, not just e.g. interrupt latency in switching the bus driver.  Is the master configured for two stop bits?  If so, configure it for one stop bit.

Totally looks like the TX Enable of the master is staying active too long.

Is the master using a crappy USB to RS485 adapter that simply uses  an RC-Diode time constant to decide when TX-EN is active?

What does the schematic around the RS485 transeiver look like?

If you can hack the slave hardware with some "blue wire" then you could also add some delay to the slaves TX line.  Maybe an 8 bit shift register clocked at 4x the baud rate.

I had issues in the past with certain PLCs not liking the response too fast. This was with modbus protocol. I wrote the slave, so i needed to delay the response. The diagram posted is confusing as the terms ‘idle’ and ‘mark’ aren't used correctly. A stop bit is an idle level and a start bit is mark level.

BTW, does a collision show up on a scope on the data line(s)?  Something like a half-voltage when the master is sending a 1 and the slave is sending a 0?  Otherwise I guess watching both master and slave driver direction bits would show the same info, or inserting a small series resistor to generate a voltage when one driver is driving hi and the other is driving lo.  I'd sure want to explore the relationship between the collisions and differing baud rates.

Interesting and clever idea.

So, if you can set stop bits, configure the master for 1 stop bit and the slave for 2 stop bits.

This will make the slave think the delay from master is a 2nd stop bit and everything should be fine, right?

I didn't make this suggestion, but the concept is simple.  Get any micro with 1 input and 1 output.  Read the serial input on the logic-level side of the slave driver chip, delay it, and pass it along to the slave micro.

For timing I would want a sampling rate of something like 10x the bit timing, so for 9600 baud (104us) I'd want around 10us sample time.  But then you need to delay the bit for perhaps 1 bit time, so you have to store at least 10 input samples before outputting them.  A 16-bit software shift register would do the trick, and you could delay up to 160us for a bit of extra margin.  You don't need a timer to set the timing (simple cycle counting would work), but a timer may make things a bit easier.

Assuming you have set a timer for a 10us tick, the pseudo-code could look something like this:

forever
{
    wait_for_timer_tick
    output_delayed_bit_from_shift_register
    input_new_bit_to_shift_register
}

If you were running an 8 MHz clock, you have 80 cycles to perform this loop.

perhaps the driver of the slave need to have the same delay line.

Just short have you remembered to give them the same ground ?

what you call 'shutdown' is the bus being released ie- not actively driven by anyone. The bias resistors determine the level. For a commercial solution, two serial<-> ethernet boxes would probably solve the issue. The likes of Perle methinks. Be sitting down when you see the price, but then again, your current commercial boxes probably aren't cheap either  There maybe cheaper serial to ethernet modules available.

You might want to tell us what the equipment is so we can be aware of it in the future.