Where is the Interrupt Vector Table

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#1
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Hi there,

 

I want to setup an interrupt routine to a pin (Button). Unfortunatelly I can't find the interrupt vector table nor do I find any example that showes that. I would like to do something like this:

ISR(INT0_vect)
{
	//user defined code
}
 

and for this I will need a file that contains this:

/* Interrupt vectors */
/* Vector 0 is the reset vector */
/* External Interrupt Request 0 */
#define INT0_vect_num		1
#define INT0_vect			_VECTOR(1)
#define SIG_INTERRUPT0			_VECTOR(1)

/* External Interrupt Request 1 */
#define INT1_vect_num		2
#define INT1_vect			_VECTOR(2)
#define SIG_INTERRUPT1			_VECTOR(2)

/* External Interrupt Request 2 */
#define INT2_vect_num		3
#define INT2_vect			_VECTOR(3)
#define SIG_INTERRUPT2			_VECTOR(3)

/* External Interrupt Request 3 */
#define INT3_vect_num		4
#define INT3_vect			_VECTOR(4)
#define SIG_INTERRUPT3			_VECTOR(4)

...

Any one that can give me a quick hint or tell me where I can find this thing! (Never search so long for the interrupt vector table especially never failed to do so! Juuust so frustrating!!crying) Atmels 1316-page-long user manual is no help for that.

 

Would be very thankful! laugh

 

Cheers 

 

Last Edited: Fri. Jun 14, 2019 - 08:31 AM
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You didn't mention which chip you are using. A manual with 1316 pages? Is it an ARM?

Last Edited: Thu. Jun 13, 2019 - 01:28 PM
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El Tangas wrote:
Is it an ARM?
Nope ISR() and INT0_vect make this an AVR8 and what's more he is using avr-gcc

 

Why, I wonder, is it important to know where the vector table is anyway? If you create an ISR() function (and the xxx_vect name is valid) it automatically hooks to the right vector anyway.

 

(if really interested look at the LSS - the vectors come immediately after the reset jump at 0x0000)

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For an arbitrary example if I build this for mega328P:

#include <avr/io.h>
#include <avr/interrupt.h>

ISR(ADC_vect) {
	PORTB = 0xAA;
}


int main(void) {
	PORTB = 0x55;
}

then the LSS has this:

00000000 <__vectors>:
   0:	0c 94 34 00 	jmp	0x68	; 0x68 <__ctors_end>
   4:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
   8:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
   c:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
  10:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
  14:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
  18:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
  1c:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
  20:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
  24:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
  28:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
  2c:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
  30:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
  34:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
  38:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
  3c:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
  40:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
  44:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
  48:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
  4c:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
  50:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
  54:	0c 94 40 00 	jmp	0x80	; 0x80 <__vector_21>
  58:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
  5c:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
  60:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>
  64:	0c 94 3e 00 	jmp	0x7c	; 0x7c <__bad_interrupt>

00000068 <__ctors_end>:
  68:	11 24       	eor	r1, r1
  6a:	1f be       	out	0x3f, r1	; 63
  6c:	cf ef       	ldi	r28, 0xFF	; 255
  6e:	d8 e0       	ldi	r29, 0x08	; 8
  70:	de bf       	out	0x3e, r29	; 62
  72:	cd bf       	out	0x3d, r28	; 61
  74:	0e 94 4e 00 	call	0x9c	; 0x9c <main>
  78:	0c 94 53 00 	jmp	0xa6	; 0xa6 <_exit>

0000007c <__bad_interrupt>:
  7c:	0c 94 00 00 	jmp	0	; 0x0 <__vectors>

00000080 <__vector_21>:
#include <avr/io.h>
#include <avr/interrupt.h>

ISR(ADC_vect) {
  80:	1f 92       	push	r1
  82:	0f 92       	push	r0
  84:	0f b6       	in	r0, 0x3f	; 63
  86:	0f 92       	push	r0
  88:	11 24       	eor	r1, r1
  8a:	8f 93       	push	r24
	PORTB = 0xAA;
  8c:	8a ea       	ldi	r24, 0xAA	; 170
  8e:	85 b9       	out	0x05, r24	; 5
}
  90:	8f 91       	pop	r24
  92:	0f 90       	pop	r0
  94:	0f be       	out	0x3f, r0	; 63
  96:	0f 90       	pop	r0
  98:	1f 90       	pop	r1
  9a:	18 95       	reti

0000009c <main>:


int main(void) {
	PORTB = 0x55;
  9c:	85 e5       	ldi	r24, 0x55	; 85
  9e:	85 b9       	out	0x05, r24	; 5

So the ADC_vect code has been linked as the destination of the vector 21 entry.

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radioman85 wrote:
Any one that can give me a quick hint or tell me where I can find this thing!

 

Every AVR datasheet has an Interrupt section, and shows the Vector table at the start of flash!???

But all you have to do in a C program is begin your ISR() function with the correct keyword or #pragma and the vector table is filled in for you.

 

Jim

 

Click Link: Get Free Stock: Retire early! PM for strategy

share.robinhood.com/jamesc3274

 

 

 

Last Edited: Thu. Jun 13, 2019 - 01:49 PM
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Given the number of pages, it sounds like an ARM to me... The vector table with weak function implementations are in the startup file in your Atmel Studio project... (completely different to how AVR implements the vector table)

:: Morten

 

(yes, I work for Atmel, yes, I do this in my spare time, now stop sending PMs)

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Err lads, everything in  #1 is from AVR8 files?

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Well, not everything.  

 

Atmels 1316-page-long user manual

I'll bet that the OP has an ATMega32 and is looking at the AVR32 manual.

 

Jim

 

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

Last Edited: Thu. Jun 13, 2019 - 07:01 PM
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Moving from Projects to AVR for now until we know more.

John Samperi

Ampertronics Pty. Ltd.

www.ampertronics.com.au

* Electronic Design * Custom Products * Contract Assembly

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clawson wrote:

what's more he is using avr-gcc

While the syntax shown is your analysis of toolchain, do we really know that?  If your assumption is right-on (spot-on?) then why doesn't OP know where the fragment shown was obtained?

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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radioman85 wrote:
(Never search so long for the interrupt vector table especially never failed to do so! Juuust so frustrating!!crying

There is no information in the CHAPTER on "Reset and Interrupt Handling"?

 

Indeed, start with the basic information:  Chip model; toolchain.

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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There's a table (see below)

 

and some assembler code (also attached)

 

Attachment(s): 

I'd rather have a bottle in front of me, than a frontal lobotomy.

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If you are using gcc, The vector table is provided by the C runtime “startup” code and put at the proper location in flash by the linker , automatically, and you don’t need to know where it is, you just need to create the isr functions with names that match the startup files. This is documented off in the avr-libc documentation.

(Avr-gcc includes xc8)

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surprise first of all, thank you very much for all your inputs! Sorry for lack of the "most essential" information:

 

Chip: Atmel AT32UC3C1256C

Compiler: avr32-gcc

 

 

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Ok, eventually I figured out how it works, thanks to your input, a few more hours and eventually by finding the other example "EIC_EXAMPLE21" for the AT32UC3C which I have totally overseen in my frustration of not getting anywhere! (only checked out the EIC_EXAMPLE1).

 

Thank you very much!!

 

Some more information if you are interested in how I got confused:

The problem was mostly, that I tried to follow the example of our previous software implementation which is,... how do I say it politically correct,... historically grown. E.g. it uses the Interrupt Vector Table from io m640.h located in 

C:\Program Files (x86)\Atmel\Studio\7.0\packs\atmel\ATmega_DFP\1.3.300\include\avr

which is then the ATmegan variant. Well setting up a new project will definitely not lead to that file when using the ASF tool, much more I would have expected to find something in the following direction:

C:\Program Files (x86)\Atmel\Studio\7.0\packs\atmel\UC3C_DFP\1.0.49\include\AT32UC3C1256C\avr32

 

One will not find anything anyway, because it is organised differently and the interrupt vectors are assigned automatically (as "clawson" already mentioned, too). Instead of getting a definition from an interrupt vector table file, one has to "register" the interrupt service routine (ISR) by using the following function:

INTC_register_interrupt(&isr_button_handler, INT_BUTTON_GROUP, AVR32_INTC_INTLEVEL_INT0);

provided by the "intc.c" file (ASF Wizard => INTC), whereas "isr_button_handler" is a function the user (me) has defined (e.g. somewhere above main()), "INT_BUTTON_GROUP" is '0' in my case (interrupt group) and the "AVR32_INC_INTLEVLE_INT0" is '0' as well. 

static void isr_button_handler(void)
{
    // ISR routine
}

int main(void)
{
   gpio_enable_module_pin(INT_BUTTON_PIN,INT_BUTTON_FUNCTION); //PIN "AVR32_EIC_EXTINT_8_PIN" that is the GPIO Pin '120', Function "AVR32_EIC_EXTINT_8_FUNCTION" that is '1'

   // Initialize interrupt vectors.
   INTC_init_interrupts();

   // Register the EIC interrupt handlers to the interrupt controller.
   INTC_register_interrupt(&isr_button_handler, INT_BUTTON_GROUP, AVR32_INTC_INTLEVEL_INT0);
}

so this at least compiled successfully (not tested with a concrete button!).

 

 

EIC_EXAMPLE21 - flawed!?:

There is a flaw (in my opinion) in this example. The example "EIC_EXAMPLE21" is designed to show how an ISR is setup. Therefore I don't understand why the code shown below, and so the registration of the two ISRs "eic_int_handler1" and "eic_int_handler2", are excluded by preprocessro if not "BOARD==EVK1101"! If one exclude this, the interrupt routines will not be registered and so will never be used (Warning occurrs as well: 'eic_int_handler1' defined but not used). So this was confusing when inhaling this example, because it doens't make sence in this example focusing exactly on that aspect => make the init of interrupts, make the registration of the ISRs,... !

#if BOARD==EVK1101
	// Initialize interrupt vectors.
	INTC_init_interrupts();

	// Register the EIC interrupt handlers to the interrupt controller.
	INTC_register_interrupt(&eic_int_handler1,
			EXT_INT_EXAMPLE_IRQ_LINE1, AVR32_INTC_INT0);
	INTC_register_interrupt(&eic_int_handler2,
			EXT_INT_EXAMPLE_IRQ_LINE2, AVR32_INTC_INT0);
#endif

 

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Why then I wonder did you mention:

ISR(INT0_vect)
{

and

#define INT0_vect			_VECTOR(1)

in post #1? That's all to do with interrupts on real (8bit) AVRs. Remember that "AVR32" isn't really an AVR. The use of "AVR" in the name is just marketing fluff to try and hoodwink people into thinking that it's somehow related to real AVRs !

 

PS I shall move this thread from the "tiny / mega" forum to the "UC3" forum (that's the real name for the "AVR32" by the way ;-)

Last Edited: Fri. Jun 14, 2019 - 08:31 AM
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Well, I'm new in a very small company (now we are 4 ;-) ) So far they did many small (firmware) projects and, as so often, it leaks in structure,... well it may have a structure in the project management, but such one that only that developer itself understands. And so, I run right away into a wrong example where I found

ISR(INT0_vect)
{

and

#define INT0_vect			_VECTOR(1)

thought it must belong to the UC3 (thx for that hint smiley). And no, that example actually comes correctly from an AtMega640 project, which I just figured out last friday. They did switch the chip once. Forgot to tell he said surprise Confused very much I was... And very thankful I am for your inputs! Learned something useful I did. laugh

 

Cheers Nik