LSB of Z Register

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Hello,

In the SPM instruction why LSB of Z register is always ignore?

 

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Most SPM operations are page wise in which case it's only the upper (page) bits in Z that are actually significant. It does depend on the page size though. AVRs have pages from 32 bytes to 256 bytes. In the smaller devices some of the LSB bits are relevant. For example if the page size were 128 bytes then bit 7 of LSB would be involved in page selection.

 

EDIT: reading some of your other threads it looks like you want to write a bootloader for mega8. If so then:

iom8a.h:#define SPM_PAGESIZE 64

So two bits of Z LSB (ie R30) are involved in the page selection aren't they?

Last Edited: Tue. Jun 11, 2019 - 11:58 AM
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clawson wrote:

Most SPM operations are page wise in which case it's only the upper (page) bits in Z that are actually significant. It does depend on the page size though. AVRs have pages from 32 bytes to 256 bytes. In the smaller devices some of the LSB bits are relevant. For example if the page size were 128 bytes then bit 7 of LSB would be involved in page selection.

 

EDIT: reading some of your other threads it looks like you want to write a bootloader for mega8. If so then:

iom8a.h:#define SPM_PAGESIZE 64

So two bits of Z LSB (ie R30) are involved in the page selection aren't they?

 

OK, but why Z0 will be ignored?

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I have no idea what "Z0" means?

 

"Z" is a 16bit register pair. It is made up of ZH (R31) and ZL (R30). As I say in the case of a micro like mega8 wiht 64 byte SPM pages then the 16 bits are:

 ZH(R31)  ZL(R30)
PPPPPPPP PP000000

So all of ZH and the upper 2 bits of ZL may be used to select pages.  So If you wanted to program page 17 (bytes 0x440..0x47F) the bits would be:

 ZH(R31)  ZL(R30)
00000100 01000000

and so on.

 

To be honest I'm not entirely sure why any of this really matters? It is what it is (as my wife hates hearing people say!). You can program any set of 64 bytes in the chip you choose.

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>why LSB of Z register is always ignore

 

because Z contains the byte address, and you can only address a word (2 bytes) with SPM, so bit0 is not needed/is unused.

Simplified-

three flash words here- word address 0-2

0: 0x0000

1: 0x0000

2: 0x0000

 

to write word0 (byte address 0), Z=0

to write word1 (byte address 2), Z=2

to write word2 (byte address 4), Z=4

you can see the pattern- bit0 of Z is always 0

 

if you want to use a word address, you have to convert to a byte address ( <<1 )-> word2 = word address 2 = byte address 4, so Z=4

 

If you want be clever and program the second half of word0 and the first half of word1 by writing 1 to Z- you can't do it because bit0 in Z is ignored and you will then be addressing word0 exclusively. Since Z bit0 is always 0 (you cannot set it), you will always be addressing words aligned on a 2byte boundary when using SPM.

 

On the other hand when using LPM, since it reads bytes, Z bit0 is needed/used and you are again using a byte address.

 

Z = byte address

SPM = Z byte address aligned on 2byte boundary (0,2,4,6,...), Z bit 0 ignored

LPM = Z byte address, bit0 is used

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Oh I see is it this specific sentence in the datasheet that is in question?

 

 

As Curt says this is simply because the flash has word granularity - you can never do anything less that "word wise" so bit 0 (which is the selector between two bytes of one word) is never required. I suppose they could have insisted that it's always 0 but what they have chose (in the silicon gates) is not to use it as part of the input at all.