[SOLVED] SAMV71 set pin function

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Hi,

I'm trying to use the Timer Counter peripheral through the Arduino compatible pin-out on the SAMV71 Xplained Ultra dev kit. The only way I've found that should be possible to do this is to use PORTE 03 (as TIOA10) and PORTE 04 (as TIOB10), both should be multiplexed in with pin function B.

 

I've set up the "timer 3, output 2" peripheral and have verified that the registers update, and that CV increments as expected, but I am having trouble porting this to the actual pins that I have connected to the oscilloscope. Do I have to take any special considerations when multiplexing the TIOA10 output to PE03?

 

This is how I try to set the pins:

#define SS_HOLD GPIO(GPIO_PORTE, 3)
#define TLGVO_BUF GPIO(GPIO_PORTE, 4)
#define TCLK_TEST GPIO(GPIO_PORTE, 5)

void system_init(void)
{
	init_mcu();

	_pmc_enable_periph_clock(ID_PIOA);
	_pmc_enable_periph_clock(ID_PIOB);
	_pmc_enable_periph_clock(ID_PIOC);
	_pmc_enable_periph_clock(ID_PIOD);
	_pmc_enable_periph_clock(ID_PIOE);

	SCB_EnableDCache();
	SCB_EnableICache();

	/* Disable Watchdog */
	hri_wdt_set_MR_WDDIS_bit(WDT);

	TIMER_0_init();

	gpio_set_pin_level(SS_HOLD,false); //TIOA10, Output, PE03 (pin 7 at jumper 502, AD6)
	gpio_set_pin_direction(SS_HOLD, GPIO_DIRECTION_OUT);
	gpio_set_pin_function(SS_HOLD, GPIO_PIN_FUNCTION_B);
	gpio_set_pin_pull_mode(SS_HOLD,GPIO_PULL_OFF);

	gpio_set_pin_level(TLGVO_BUF,false); //TIOB10, Input, PE04 (pin 8 at jumper 502, AD7)
	gpio_set_pin_direction(TLGVO_BUF, GPIO_DIRECTION_IN);
	gpio_set_pin_function(TLGVO_BUF, GPIO_PIN_FUNCTION_B);
	gpio_set_pin_pull_mode(TLGVO_BUF,GPIO_PULL_OFF);

	gpio_set_pin_level(TCLK_TEST,false); //TIO_CLK10, Output, PE05 (pin 4 at jumper 504, AD11)
	gpio_set_pin_direction(TCLK_TEST, GPIO_DIRECTION_OUT);
	gpio_set_pin_function(TCLK_TEST, GPIO_PIN_FUNCTION_B);
	gpio_set_pin_pull_mode(TCLK_TEST,GPIO_PULL_OFF);
}

Note that before I set the pin directions and functions I initialize the timer:

 

static void TIMER_0_init(void)
{
	_pmc_enable_periph_clock(ID_TC3_CHANNEL1);

	hri_tc_write_WPMR_WPKEY_bf(TC3,"TIM");			//Clear write protection register
	hri_tc_clear_WPMR_WPEN_bit(TC3);			//Clear write protection register

	hri_tc_set_CMR_WAVE_bit(TC3,1);				// 1 = CMR register is in Waveform mode (as opposed to capture mode)
	hri_tc_set_CMR_TCCLKS_bf(TC3,1,1);			// 1 = TIMER_CLOCK2 = Clock selected: internal MCK/8 clock signal (from PMC)
	hri_tc_set_CMR_WAVEFORM_ACPC_bf(TC3,1,1);		// RC Compare Effect on TIOAx, 1 = SET
	hri_tc_set_CMR_WAVEFORM_WAVSEL_bf(TC3,1,0);		// 2 = UP_RC = UP mode with automatic trigger on RC Compare. 0 = UP = UP mode without automatic trigger on RC Compare
	hri_tc_set_CMR_WAVEFORM_ENETRG_bit(TC3,1);		// 1 = The external event resets the counter and starts the counter clock
	hri_tc_set_CMR_WAVEFORM_EEVT_bf(TC3,1,0);		// 0 = TIOB Input, shouldn't be necessary to clear since default is zero
	hri_tc_set_CMR_WAVEFORM_EEVTEDG_bf(TC3,1,1);		// 1 = Rising edge
	hri_tc_set_CMR_WAVEFORM_CPCSTOP_bit(TC3,1);		// 1 = Counter clock is stopped when counter reaches RC.
	hri_tc_write_RC_reg(TC3,1,57);				// RC contains the Register C value in real time
	hri_tc_set_EMR_NODIVCLK_bit(TC3,1);			// 1 = The selected clock is peripheral clock and TCCLKS field (TC_CMRx) has no effect.
	hri_tc_set_IMR_CPCS_bit(TC3,1);				// Interrupt for CPCS (RC Compare)
	hri_tc_set_CMR_WAVEFORM_ASWTRG_bf(TC3,1,2);             // 2 = CLEAR , Software Trigger Effect on TIOAx

	NVIC_DisableIRQ(TC10_IRQn);
	NVIC_ClearPendingIRQ(TC10_IRQn);
	NVIC_EnableIRQ(TC10_IRQn);

	hri_tc_write_CCR_reg(TC3,1,TC_CCR_CLKEN | TC_CCR_SWTRG);
}

And this all seems to work (TC10_Handler() is triggered and the registers update)

This topic has a solution.
Last Edited: Fri. Jun 7, 2019 - 06:19 AM
This reply has been marked as the solution. 
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Total votes: 0

Solved:
The problem was due to a couple of zero-ohm resistors missing on the XULT dev kit. They are intentionally missing in order to support the LCD connector and SDRAM module.