I would like to implement a quadrature encoder on the new 8 pin ATtinys that has the least burden on the CPU as is reasonably possible, using the Configurable Custom Logic (CCL) features. I see that there's an example of this in the app note http://ww1.microchip.com/downloads/en/AppNotes/Interf-Quad-Encoder-CCL-w-TCA-TCB-DS00002434C.pdf but the downside of this approach for 8 pin devices is that it would use all potential 6 GPIOs and leave none for an interface to, say, a master controller uC.
The reason I would like to do this is mainly to learn about squeezing the maximum performance out of these new ATtinys, so there's admittedly a somewhat hypothetical constraint in selecting the 8 pin devices. That said, I would appreciate any tactics that people can suggest about using the CCL/ Event System and other features to read a quad encoder. Do the timers in the app note need to be routed out through GPIOs or is there a different way of plugging the sequential logic together to determine direction without needing these extra four GPIOs (on top of the two that are from the encoder channels - PC4, PC5, PA3 & PA5) for TCB?