I2C master/slave code for ATtiny series 1

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Since I found Atmels's I2C sample code somewhat confusing I wrote my own code for 

 

a) polled master, including functions to access slave c)

b) interrupt driven slave

c) as b), organized as addressable byte array, similar to EEPROM

 

The code is much more compact and robust against transmission faults than Microchip's original code. I have made extensive tests arbitrarily shorting the signal lines against ground. During these tests both master and slave recovered under all circumstances. Code development was somewhat tricky since the processors did not behave under all circumstances as expected from Microchips's documentation.

 

The code has been tested with two ATtiny processors operatings as master and slave. So far I have not done any tests with "real life" I2C chips. I would be glad to receive comments, enhancements, criticism, especially from interested forum members that could provide tests with I2C periphery.

 

A ZIP file is included, please ask questions if code usage needs additional explanation.

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not quite sure if this is the right place for this post. maybe in tutorials section is better ?

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Nicely done, I've grabbed a copy I hope to try out on a t4809 when I have the time.

I might suggest you put a copy on github, then you will only need to post a link to it.

Thanks again for the contribution.

 

Jim

 

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