Need better understanding - ATtiny

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I am working a project using the ATtiny404.  This is my first use of the ATtiny series and  I recently struggled to understand why I was having issues getting the TCB0 to properly run in 'Periodic Interrupt' mode.   I ended up discovering that the interrupt flag needed to be manually cleared prior to exiting the ISR.  This is the first time that I have encountered this necessity and have always relied on the RETI to reset the interrupt flag.  Shame on me for not carefully reading the manual!

 

Would someone please explain why this is the case where the interrupt flag is reset manually?  Is there an unseen advantage to doing it this way?

Thanks

Jim

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rfdes wrote:

 

Would someone please explain why this is the case where the interrupt flag is reset manually?

Why?  We can only guess! 

 

Jim

 

 

(Possum Lodge oath) Quando omni flunkus, moritati.

"I thought growing old would take longer"

 

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ki0bk wrote:

rfdes wrote:

 

Would someone please explain why this is the case where the interrupt flag is reset manually?

Why?  We can only guess! 

 

Jim

 

 

So, can I assume this is 'typical' in the ATtiny or do any of the other flavors of AVR require the programmer to manually reset the Int flag?

 

Jim

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As far as I know only the latest 0/1 series have this requirement, how do xmega's handle this?

 

Jim

 

 

(Possum Lodge oath) Quando omni flunkus, moritati.

"I thought growing old would take longer"

 

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rfdes wrote:
... Would someone please explain why this is the case where the interrupt flag is reset manually?  Is there an unseen advantage to doing it this way?...
The flag may not autoclear so that an interrupt handler can examine (poll) peripheral interrupt registers to find the particular event that triggered an interrupt: if the event is one of many that share the same interrupt vector and handler. Is it?

 

- John

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rfdes wrote:
So, can I assume this is 'typical' in the ATtiny or do any of the other flavors of AVR require the programmer to manually reset the Int flag?

 

XMEGAS do this as well, and since many of the newer Tinys exhibit many of the XMEGAs features they re nicknamed XTINY

 

As I found out here for the XMEGA 32e5:

https://www.avrfreaks.net/forum/...

 

I too wondered why the flag needs to be manually cleared

 

jfiresto wrote:

The flag may not autoclear so that an interrupt handler can examine (poll) peripheral interrupt registers to find the particular event that triggered an interrupt: if the event is one of many that share the same interrupt vector and handler. Is it?

 

Maybe.  I have not looked too deeply at the datasheet in a few days(week), but your thought is valid as the event system in an XMEGA can be a little complicated when mixed with interrupts.  NOt sure if teh XTinys have an event system as well.

 

JIm

I would rather attempt something great and fail, than attempt nothing and succeed - Fortune Cookie

 

"The critical shortage here is not stuff, but time." - Johan Ekdahl

 

"Step N is required before you can do step N+1!" - ka7ehk

 

"If you want a career with a known path - become an undertaker. Dead people don't sue!" - Kartman

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jgmdesign wrote:

 

XMEGAS do this as well, and since many of the newer Tinys exhibit many of the XMEGAs features they re nicknamed XTINY

 

 

 

Hmmm... the only Xmega that I've worked with was the ATxmega128A3U and every interrupt(timers,usart, ext int)  that I used didn't require me to manually clear the interrupt flags.

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I will check the datasheet on that device later tonight when I have some time.

 

My post was not law, it is only my observation - and others as well - regarding the Tinys behaviours in recent models.

 

Jim

I would rather attempt something great and fail, than attempt nothing and succeed - Fortune Cookie

 

"The critical shortage here is not stuff, but time." - Johan Ekdahl

 

"Step N is required before you can do step N+1!" - ka7ehk

 

"If you want a career with a known path - become an undertaker. Dead people don't sue!" - Kartman

"Why is there a "Highway to Hell" and only a "Stairway to Heaven"? A prediction of the expected traffic load?"  - Lee "theusch"

 

Speak sweetly. It makes your words easier to digest when at a later date you have to eat them ;-)  - Source Unknown

Please Read: Code-of-Conduct

Atmel Studio6.2/AS7, DipTrace, Quartus, MPLAB, RSLogix user

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jgmdesign wrote:

I will check the datasheet on that device later tonight when I have some time.

 

My post was not law, it is only my observation - and others as well - regarding the Tinys behaviours in recent models.

 

Jim

 

I appreciate all of the advise and insight.  I just wish I understood why this is the case.

Take care - Jim

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While Atmel have called these chips "tiny" they bear very little relationship to previous mega/tiny. They are really reduced resource Xmega so you will benefit more if you have knowledge of Xmega. This is why the usual name used is "Xtiny". Some of the Xmega like features are register./names in the Xmega style. Peripherals no longer set pin directions so usually need to be set separately. Unlike tiny/mega reading peripherals in ISR no longer auto clears interrupt flags and it must be done manually/separately. All the peripherals tend to have an "Xmega layout" not a tiny/mega one.

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clawson wrote:
While Atmel have called these chips "tiny" they bear very little relationship to previous mega/tiny. They are really reduced resource Xmega so you will benefit more if you have knowledge of Xmega. This is why the usual name used is "Xtiny". Some of the Xmega like features are register./names in the Xmega style. Peripherals no longer set pin directions so usually need to be set separately. Unlike tiny/mega reading peripherals in ISR no longer auto clears interrupt flags and it must be done manually/separately. All the peripherals tend to have an "Xmega layout" not a tiny/mega one.

 

 

Thanks for the info...

Jim