Why command ADIW has only two positions of dd?

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On  official microchip website the command ADIW has only two positions of dd. So how then they can represent on this command's opcode these registers 24,26,28,30? There are no places for binary digits. 

Here is the opcode of ADIW:

16-bit Opcode:

1001

0110

KKdd

KKKK

 

 

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Because it is given that you are working with a register pair, and not single registers.

 

From the page linked:

Adds an immediate value (0-63) to a register pair and places the result in the register pair. This instruction operates on the upper four register pairs, and is well suited for operations on the pointer registers.

and:

Syntax: Operands: Program Counter:

(i)ADIW Rd+1:Rd,K d E {24,26,28,30}, 0 <= K <= 63 PC ← PC + 1

 

Jim

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dd=2 bits=4 choices,  choose your pair

kkkkkkk=6 bits=64 choices, choose your number

roll the dice

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

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ToHardToForget wrote:
So how then they can represent on this command's opcode these registers 24,26,28,30?

 

dd

00 = 24

01 = 26

10 = 28

11 = 30

 

You only need two bits to represent 4 choices. By design the opcode already knows it's a 2 register offset from R24.

 

The whole point of AVR opcodes is that they are 16 bits so there are 65536 possible bit patterns. They are almost all used up so Atmel had to pack some things into very few bits. There's a lot of compromises. ADIW would have been even better if there'd been 4 its to select the pair so all 32 registers could have been usable. The compromise is that only 4 pairs can be chosen because there only were 2 bits.

 

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And remember that the opcode only save code space not speed.(it take 2clk) 

A SUBI on low byte and then a SBCI on the high byte can do the same, and work for all 16bit values  , and on the top 16 registeres. 

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sparrow2 wrote:

And remember that the opcode only save code space not speed.(it take 2clk) 

A SUBI on low byte and then a SBCI on the high byte can do the same, and work for all 16bit values  , and on the top 16 registeres. 

 

Just to make it very clear to the reader,

 

ADIW  R24, 2   ; adding immediate 2 (max 63) to register pair R25:R24

 

will add 2 to R24, any carry will be added automatically to R25.

If R25:R24 = 0x0005, the result will be 0x0007

is the same as

 

SUBI R24,-2    ; advantage that you can use immediate larger than 63

SBCI R25,-1    ; -1 (255) necessary to compensate negative carry bit

 

In the above example, the SUBI R24,-2 will subtract -2 (+254) from R24.

If R25:R24 = 0x0005, the result MUST be also 0x0007 :

R24=0x05, R25=0x00

SUB R24,-2 = SUB R24,+254

R24 = 0x05 - 254 = -249 = +7, and Cbit=1 because it roll down through zero and FF, FE... to become 0x07.

 

Then the SBCI R25,-1  subtracts the immediate -1 (0xFF) from R25, R25 was zero, -255 becomes 1, subtracting Carry bit, 1-1 = 0, R25 still zero.

Result R25:R24 = 0x0007

 

Now, just to fix the idea the other way around with Cbit:

Suppose R25:R24 = 255 (0x00FF)

ADIW R24,3 result in R25:R24 = 258 (0x0102)

 

SUB R24,-3

R24 = 255 - (-3) = 255 - 253 = 2, but no Carry, so Cbit = 0

SBCI R25, -1

R25 = 0 - (-1) - Cbit = 0 - 255 - 0 = -255 = 1

R25:R24 = 0x0102

 

 

Wagner Lipnharski
Orlando Florida USA

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wagnerlip wrote:

SUBI R24,-2    ; advantage that you can use immediate larger than 63

SBCI R25,-1    ; -1 (255) necessary to compensate negative carry bit

 

You can view that "-1" in r25 as the sign extension of r24. That is, the 16 bit hex representation of -2 is 0xFFFE, so 0xFE goes to r24 and 0xFF goes to r25.

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El Tangas wrote:
You can view that "-1" in r25 as the sign extension of r24.

Doesn't the approach used by CodeVisionAVR handle signed situations?

                 	.MACRO __ADDWRN
                 	SUBI R@0,LOW(-@2)
                 	SBCI R@1,HIGH(-@2)
                 	.ENDM

 

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Sure, as long as the macro argument "@2" is interpreted as having at least the same size as the operation you intend to do (in this case 16 bit), signs will be handled correctly.

Since LOW and HIGH presumably assume a 16 bit argument, everything will work fine.

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El Tangas wrote:

Sure, as long as the macro argument "@2" is interpreted as having at least the same size as the operation you intend to do (in this case 16 bit), signs will be handled correctly.

Since LOW and HIGH presumably assume a 16 bit argument, everything will work fine.

 

Under the hood CVAVR uses 'avrasm2' as its backend assembler so a look at the manual for that will tell all.

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