I am working on a data acquisition of two simultaneous analog values using MAX1062 200ksps 14 bit chips. The SPI transfer takes place when the CS line is pulled low and 24 clock cycles moves out the data in 8 bit segments.
There are two SPI buffers in an ATXmega16A4U. Since I want both ADCs to move the data into the SPI buffers simultaneously should I set up one as a master connected to both ADC clock inputs and the second Xmega SPI (configured as slave) with the two ADC outputs connected to the two Xmega MISO inputs? Only the CS and CLK inputs are used on the ADCs (MOSI is not used).
I presume that I would write three bytes into the master SPI to receive each piece of the ADC output (reading the values in between each write)?
Does this appear to be a reasonable approach?