could someone, please, help me understand what's going on?
Consider the following main loop:
unsigned int out = 0;
out = ~out;
piob->PIO_MSKR = (1 << 14);
piob->PIO_ODSR = out;
This just toggles PB14. I don't present initialization here. The main clock is generated by the 12 MHz internal RC oscillator, and then multiplied in PLL (by factor 83). The core runs at 498 MHz, MCK = 166 MHz, so I assume that peripheral clock of PIO is 83 MHz. This peripheral clock is enabled in PMC. Frequency of MCK can be verified by configuring, say, PCK1 to use MCK and divide it by 250. The resulting square waveform (PCK1) has frequency near 666 kHz, that is the expected value.
The program is built with GCC 4.9, with optimization -Os. The while loop disassembles to:
2104ec: 43e4 mvns r4, r4
2104ee: f44f 4280 mov.w r2, #16384 ; 0x4000
2104f2: 601a str r2, [r3, #0]
2104f4: 619c str r4, [r3, #24]
2104f6: e7f8 b.n 2104ea <main+0xae>
I would expect that this loop takes more or less 10 processor cycles, some in the core, some accessing the system bus. Assuming that all cycles are of MCK (lower bound), the waveform generated by toggling PB14 has frequency equal to MCK / 10 = 16.6 MHz.
My oscilloscope shows only ca. 1.85 MHz. Why?