Prior to enabling an interrupt for a particular port pin, I would like to clear any pending interrupts for that pin (and only that particular pin). There is a register PIO_ISR (Interrupt Status Register) which indicates whether a state change has been detected since the last time this register was read. The register is automatically cleared once it is read.
I have verified that reading the PIO_ISR register prior to enabling the interrupt prevents the interrupt from misfiring due to a level change that occurred prior to enabling the interrupt for that pin. The problem is that this will also clear pending interrupts for ALL of the other pins on the port - which is not what I want. This could cause me to miss a level change on one of the other pins which are being used for other purposes. Imagine trying to track down that bug later on.
Once I read PIO_ISR, if I find that there are interrupts pending on other pins, there is no way to retrigger those interrupts. PIO_ISR is read-only and the interrupts just got cleared.
Just about every other register in the PIO has bit-level access. I don't understand why the Interrupt Status Register isn't the same, as it would really help here. Seems crazy. Am I missing something?