LCDC and VGA / DVI Displays

Go To Last Post
16 posts / 0 new
Author
Message
#1
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Hi,

since there's not really much info about how to use the LCDC of the AT32AP7000 out there I'll just ask you guys here...
Is there a way to easily attach an VGA or DVI Display to the LCDC of the AT32AP7000? In the other thread on DVI Displays I read something about video DACs for VGA and TMDS serializers for DVI. Where can I get those things?

Regards,
Alloc

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

The LCD controller is made for driving a LCD panel directly, it has as stated in the datasheet 3 x 8-bit color output.

Yes, you must have an external IC if you plan to interface VGA or DVI.

Hans-Christian

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Alloc86 wrote:
In the other thread on DVI Displays I read something about video DACs for VGA and TMDS serializers for DVI. Where can I get those things?

STK1000 has a VGA DAC, check the schematic from the Atmel website for details. In the other thread I mentioned the possibility of TMDS serializers and, as I said in that thread, I don't even know if they exist. I mentioned that the company who created DVI is Silicon Image, check them out for any appropriate serializers.

-S.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

BTW:

Alloc86 wrote:
since there's not really much info about how to use the LCDC of the AT32AP7000 out there I'll just ask you guys here...
What kind of info did you want? The LCDC section in the datasheets of all AVR32s which have it I found pretty good :)

-S.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Thanks for your replies =)

@squidgit: Yeah, found some TMDS serializers ... but only at their dev-companies. Couldn't find them at any distributor so far :(
VGA ... hard to find them at distributors too ... but it seems like it's easier than for the TMDS ones. What I'm wondering right now is (yeah, of course I looked at the DS ;) ): what is the LCDC clock? Eg it's stated that the PCLK is derived from the LCDC clock but I couldn't find where the LCDC clock is defined.

What I found:
TMDS:
Silicon Image
Chrontel
VGA:
Analog Devices (you can get them at eg DigiKey)

If anyone else knows of any chips for VGA/DVI I'd be happy if they could post them here =)

Alloc

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Alloc86 wrote:
what is the LCDC clock? Eg it's stated that the PCLK is derived from the LCDC clock but I couldn't find where the LCDC clock is defined.
The LCDC clock is controlled directly from the PM. In the default Linux setup, it is set to 1/2 MCLK IIRC. Like all (well behaved) clocks in Linux it can be changed with appropriate clk_get()/clk_set_rate()s.

-S.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

I think you can also use THS8135 from TI for VGA output

http://focus.ti.com/docs/prod/fo...

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

squidgit wrote:
Alloc86 wrote:
what is the LCDC clock? Eg it's stated that the PCLK is derived from the LCDC clock but I couldn't find where the LCDC clock is defined.
The LCDC clock is controlled directly from the PM. In the default Linux setup, it is set to 1/2 MCLK IIRC. Like all (well behaved) clocks in Linux it can be changed with appropriate clk_get()/clk_set_rate()s.

-S.


Please answer the same question, but for a non-Linux setup. I want to program my LCDC writing my application directly in C using the same setup as the examples and Cygwin environment.

Where does the LCDC clock come from, and are there any settings I must make before initializing the LCDC?

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

GregoryC wrote:
Where does the LCDC clock come from, and are there any settings I must make before initializing the LCDC?

Please see the section about "Generic clocks" in the "Power Manager" chapter of the data sheet. IIRC you'll have to write to at least one register to select the clock source and divider for the LCDC clock, as well as enable it.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

I notice that the timer/counter is subject to the same requirements as the LCDC as far as enabling the clock, "The Timer Counter clock is generated by the power manager. Before using the TC, the programmer
must ensure that the TC clock is enabled in the power manager." I see no code in the timer/counter example to enable the TC clocks, so why should the LCDC require anything different?

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Additionally I note in 32003 1.5.5 Peripheral clock masking that, "By default, the clock for all modules are enabled, regardless of which modules are actually being used. It is possible to disable the clock for a module in the CPU, HSB, PBA, or PBB clock domain by writing the corresponding bit in the Clock Mask register ..."

Doesn't that state that the LCDC clocks will be running from startup as long as they are not disabled elsewhere?

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

GregoryC wrote:
Additionally I note in 32003 1.5.5 Peripheral clock masking that, "By default, the clock for all modules are enabled, regardless of which modules are actually being used. It is possible to disable the clock for a module in the CPU, HSB, PBA, or PBB clock domain by writing the corresponding bit in the Clock Mask register ..."

Doesn't that state that the LCDC clocks will be running from startup as long as they are not disabled elsewhere?

The LCDC requires two clocks. One of them is the peripheral clock which, as quoted above, is enabled by default. The other one is the pixel clock, which is a "generic clock" and must be explicitly initialized and enabled. The generic clocks are a lot more flexible than the peripheral clocks, but they're also a bit more complex to set up.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

I've enabled Generic Clock #7 which according to 32002 Table 10-3 is dedicated to the LCDC, presumably the pixel clock, but no change. My program still crashes as soon as I read or write any LCDC register.

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

Then your generic clock is not running.

Double check it :) Correct PLL chosen? OSC chosen? Dividers, etc...

Hans-Christian

  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

hce wrote:
Then your generic clock is not running.

Double check it :) Correct PLL chosen? OSC chosen? Dividers, etc...


Not using any PLL. Using default Osc 0. Not using any divider.

  volatile struct avr32_pm_t *pm = &AVR32_PM;
  #define PM_HSBMASK_ENABLE_LCDC_CLOCK_MASK 0x80;
  pm->hsb_mask |= PM_HSBMASK_ENABLE_LCDC_CLOCK_MASK;
  pm->gcctrl[7] |= AVR32_PM_GCCTRL7_CEN<<AVR32_PM_GCCTRL7_CEN_OFFSET;
  • 1
  • 2
  • 3
  • 4
  • 5
Total votes: 0

FYI, I discovered I was using an inappropriate #define from the ap7000.h header file. I was able to write LCDC registers okay after fixing the mistake. Problem solved. :)