AVR Freaks

And people wonder why I always initialise every register and avoid |=.

The AVR instruction set also has bit manipulation instructions.

ASM codes are sbi (set bit immediate) and cbi (clear bit immediate).

A long time ago it was common to use C macro's to acces these asm instructions.

And then they got moved to:

/usr/lib/avr/include/compat/deprecated.h

/**
   \ingroup deprecated_items
   \def sbi(port, bit)
   \deprecated

   Set \c bit in IO port \c port.
*/
#define sbi(port, bit) (port) |= (1 << (bit))

I used to nitpick over small things.

When changing a single bit, |= gets translated to a sbi instruction and is the fastest.

When changing 3 or more bits in a single I/O register just loading a consstant and setting the whole byte is faster.

For example this is avr-gcc with a mega328:

int main(void)
{
	// these in range of SBI / CBI
	PORTB |= (1 << 3);
	PORTB &= ~(1 << 5);

	// these in range of IN / OUT
	MCUCR |= (1 << IVSEL);
	MCUCR &= ~(1 << BODS);

	// these only reachable with ST(S)/LD(S)
	UCSR0B = (1 << TXEN0);
	UCSR0B &= ~(1 << RXEN0);
}

the code generated is:

	// these in range of SBI / CBI
	PORTB |= (1 << 3);
  80:	2b 9a       	sbi	0x05, 3	; 5
	PORTB &= ~(1 << 5);
  82:	2d 98       	cbi	0x05, 5	; 5

	// these in range of IN / OUT
	MCUCR |= (1 << IVSEL);
  84:	85 b7       	in	r24, 0x35	; 53
  86:	82 60       	ori	r24, 0x02	; 2
  88:	85 bf       	out	0x35, r24	; 53
	MCUCR &= ~(1 << BODS);
  8a:	85 b7       	in	r24, 0x35	; 53
  8c:	8f 7b       	andi	r24, 0xBF	; 191
  8e:	85 bf       	out	0x35, r24	; 53

	// these only reachable with ST(S)/LD(S)
	UCSR0B = (1 << TXEN0);
  90:	e1 ec       	ldi	r30, 0xC1	; 193
  92:	f0 e0       	ldi	r31, 0x00	; 0
  94:	88 e0       	ldi	r24, 0x08	; 8
  96:	80 83       	st	Z, r24
	UCSR0B &= ~(1 << RXEN0);
  98:	80 81       	ld	r24, Z
  9a:	8f 7e       	andi	r24, 0xEF	; 239
  9c:	80 83       	st	Z, r24

You, the programmer didn't have to tell the compiler which type of access to use (with optimization enabled) it will use the best it can. So if the target (PORTB) is low enough it can use SBI/CBI, if it's in range on IN/OUT (MCUCR) then those are used but if it's at a high SFR address then it has to use ST.

BTW see what happens if you switch the optimizer off:

    // these in range of SBI / CBI
    PORTB |= (1 << 3);
  88:	85 e2       	ldi	r24, 0x25	; 37
  8a:	90 e0       	ldi	r25, 0x00	; 0
  8c:	25 e2       	ldi	r18, 0x25	; 37
  8e:	30 e0       	ldi	r19, 0x00	; 0
  90:	f9 01       	movw	r30, r18
  92:	20 81       	ld	r18, Z
  94:	28 60       	ori	r18, 0x08	; 8
  96:	fc 01       	movw	r30, r24
  98:	20 83       	st	Z, r18
    PORTB &= ~(1 << 5);
  9a:	85 e2       	ldi	r24, 0x25	; 37
  9c:	90 e0       	ldi	r25, 0x00	; 0
  9e:	25 e2       	ldi	r18, 0x25	; 37
  a0:	30 e0       	ldi	r19, 0x00	; 0
  a2:	f9 01       	movw	r30, r18
  a4:	20 81       	ld	r18, Z
  a6:	2f 7d       	andi	r18, 0xDF	; 223
  a8:	fc 01       	movw	r30, r24
  aa:	20 83       	st	Z, r18

    // these in range of IN / OUT
    MCUCR |= (1 << IVSEL);
  ac:	85 e5       	ldi	r24, 0x55	; 85
  ae:	90 e0       	ldi	r25, 0x00	; 0
  b0:	25 e5       	ldi	r18, 0x55	; 85
  b2:	30 e0       	ldi	r19, 0x00	; 0
  b4:	f9 01       	movw	r30, r18
  b6:	20 81       	ld	r18, Z
  b8:	22 60       	ori	r18, 0x02	; 2
  ba:	fc 01       	movw	r30, r24
  bc:	20 83       	st	Z, r18
    MCUCR &= ~(1 << BODS);
  be:	85 e5       	ldi	r24, 0x55	; 85
  c0:	90 e0       	ldi	r25, 0x00	; 0
  c2:	25 e5       	ldi	r18, 0x55	; 85
  c4:	30 e0       	ldi	r19, 0x00	; 0
  c6:	f9 01       	movw	r30, r18
  c8:	20 81       	ld	r18, Z
  ca:	2f 7b       	andi	r18, 0xBF	; 191
  cc:	fc 01       	movw	r30, r24
  ce:	20 83       	st	Z, r18

    // these only reachable with ST(S)/LD(S)
    UCSR0B = (1 << TXEN0);
  d0:	81 ec       	ldi	r24, 0xC1	; 193
  d2:	90 e0       	ldi	r25, 0x00	; 0
  d4:	28 e0       	ldi	r18, 0x08	; 8
  d6:	fc 01       	movw	r30, r24
  d8:	20 83       	st	Z, r18
    UCSR0B &= ~(1 << RXEN0);
  da:	81 ec       	ldi	r24, 0xC1	; 193
  dc:	90 e0       	ldi	r25, 0x00	; 0
  de:	21 ec       	ldi	r18, 0xC1	; 193
  e0:	30 e0       	ldi	r19, 0x00	; 0
  e2:	f9 01       	movw	r30, r18
  e4:	20 81       	ld	r18, Z
  e6:	2f 7e       	andi	r18, 0xEF	; 239
  e8:	fc 01       	movw	r30, r24
  ea:	20 83       	st	Z, r18

(this is why I have an entry in my signature saying "never use -O0"!!!)

Interesting, I guess.  How much time have you spend with datasheets -- core, memory, register summary?

...yet you are trying to implement "generic I/O" to which (as you are finding out) the AVR architecture is not well suited.  [As commented in prior discussions, are the port connections on your app board going to change during operation such that you need to "pass" the information?]

At the risk of being lambasted, not from me.  Yes, certainly, things can get confusing.  But on the one hand saying you read a lot in the datasheets and then saying you never looked at the core,memory,I/(O register sections on the other hand, even when a situation related to them, seems contradictory.  On the one hand you don't use libraries yet on the other hand the original situation was apparently caused by using pre-built code, and not initializing used peripherals.  In a similar vein, it appears that you are using pre-built mechanisms for generic I/O?  Yet you seem concerned with when a CBI is generated.  Lessee -- a few cycles and words for direct access, and many words and cycles for generic.

That's all I'm pointing out.  Remember that I am the resident Surly Curmudgeon.

Sheesh.  Please list specific examples of your works and my "re-interpretation".  I went back and re-read what YOU POSTED.  OK, fine....I'll go away from this thread.