Damage from piezo sounder element?

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As mentioned in this thread, I have a SAM R21 driving a piezo sounder element with complementary drive:

 

 

Obviously the above is just a prototype, but the client is getting field returns with excessive (~1mA when it should be ~3uA) current drain in standby.

 

One thing I've noticed is that there are "spikes" on the pins driving the piezo - CH2 (turquoise):

 

 

Zooming-in on a spike:

 

 

The supply is 3V;  so 3.8V is quite an overshoot - and exceeds the "Absolute Maximum" in the datasheet.

 

So the "General Electronics" question is: is it possible/likely that this could be stressing the pin drivers, and leading (eventually) to the excess current ... ?

(after all that is the meaning of the "Absolute Maximum" ratings - isn't it?)

 

Has anyone seen such things causing problems elsewhere?

 

 

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awneil wrote:
with complementary drive:

I'll assume this means across two port pins, can you post the maker and model # of the piezo sounder.

 

I have been involved with 100k+ piezo elements driven just that way, and have not seen anything like that at least with the 25kHz speakers I have used.

What is the environment that they are being used in?  Free air, enclosed, or ???

A piezo, by its nature will generate a voltage if an external pressure is applied, or a shock of some sort.

 

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Caveat: know (almost) nothing about SAM R21. But, I wonder...

 

Are the "complementary" pins on the same port? If not, there won't there be a delay between the two pin changes, depending on the clock rate?

 

Jim

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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ki0bk wrote:
I'll assume this means across two port pins

Indeed - see: https://www.avrfreaks.net/commen...

 

can you post the maker and model # of the piezo sounder.

sorry, I don't know - other than it's 13mm dia x 0.15mm thick!

 

I have been involved with 100k+ piezo elements driven just that way, and have not seen anything like that

indeed.

Are you working at 3V? I guess the overshoot wouldn't be so significant at 5V ?

 

What is the environment that they are being used in?  Free air, enclosed, or ???

They are in a small "tag" enclosure, with some little "sound holes"

 

A piezo, by its nature will generate a voltage if an external pressure is applied, or a shock of some sort.

and, presumably, from the motion set up by the drive?

 

I guess it could be that the overshoot shown isn't (quite) enough to be a problem, and knocks aren't generally a problem - but could be a problem if they conspire together ... ?

I don't know how prevalent the problem actually is?

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ka7ehk wrote:
Are the "complementary" pins on the same port?

Yes, they are;  and, specifically, on pins where the timer hardware gives the complementary drive - not bit-banged.

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Interesting problem.

 

I have used a fair number of Piezo's, but only in small numbers projects, no commercial designs, so I have nowhere near the experience kiObk has.

 

That said, I usually drive them from one I/O pin, or from one I/O pin driving a low side NFet, and the piezo is connected to the Vin into the voltage regulator.  I direct drive them, no series capacitor, as is sometimes suggested.

 

I assume you have re-acquired the failure units and then re-verified the current draw yourself?

 

How many, (N and % total), failed?

If the numbers are such that one can reasonably re-create a failure, then I'd set up one (or several), devices, on the same power supply, that beep continually.  One with the current driver configuration, one with a series R, to limit the piezo current.  Let them run all weekend and test the current draws Monday. Additionally set up a control board with just a 510 ohm load instead of the piezo.  (So, three configurations).

 

I'm not convinced that the piezo is the culprit causing the problem.  Could it be a leaky cap in the power supply?  Perhaps subjected to the occasional Mains noise/spike? Or were the demo units always battery powered?

 

I've seen working I/O pins, and failed I/O pins, but I'll confess to not knowing enough about the micro's internal I/O driver stage to know if it can undergo a partial failure, resulting in the increased current you are seeing.

 

I assume, also, your piezo is a true piezo element, (hence your drive technique), and that it does not have any circuitry hidden within the case of the piezo?

 

Lastly, I assume you feel that the spikes you are seeing are "real", and not artifact?

 

JC

 

 

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This spikes may be significant w.r.t. absolute maximums, but I'd characterise them as minimal for an open-circuit piezo.  Naturally, since your two drive pins are low-impedance.

 

I've nowhere near the experience of other respondents.  However, when I've fiddled with direct drive of piezos and small magnet+coil speakers in the past, I found that I had to keep the output drive enabled until the transducer had settled down.  While prototyping I mistakenly configured the two complementary drive pins as inputs when placing the unit into a sleep mode.  Whenever this happened, the unit would latch up or otherwise malfunction.  A bit of poking around with a scope and I discovered that doing so immediately after playing a sample would result in very high voltages appearing across the two drive pins, as the transducer returned to a neutral position, rebounding a few times on the way.  In retrospect, this was obvious since as inputs they go high-impedance.

 

Keeping the drive pins as outputs even in sleep, or at least for a few hundred ms after a sample was played, would prevent this.  While the pins did still experience slight over- and under-voltages, this was a one-off and I wans't concerned.  The unit is still in service today, some 5 years later.  I have not, however, characterised it's low-power performance after that length of time in service.

 

So the moral/question is, does one or both of your two piezo drive pins ever go high-impedance?  If so, can it happen immediately after a tone is played?  If so, then much higher voltages than you have seen during drive, and captured above, may be hitting those pins, and that could indeed cause problems down the road.

 

Or, as suggested, the SAM might be more sensitive to over-voltages in I/O pins, and even the slight over-voltage you've seen might be enough to explain your symptoms.

 

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DocJC wrote:
I assume you have re-acquired the failure units and then re-verified the current draw yourself?

I have some samples of both "good" and "bad".

 

Spikes seem to be much the same on both.

 

How many, (N and % total), failed?

That I don't know (yet)

 

Let them run all weekend

It would have to be a weekend when I am far, far away!!

 

surprise

 

 

I'm not convinced that the piezo is the culprit causing the problem. 

Neither am I - it's just speculation.

 

 

Could it be a leaky cap in the power supply? 

Maybe

 

Perhaps subjected to the occasional Mains noise/spike? Or were the demo units always battery powered?

They are battery powered - hence why uA are important and mA are bad!

 

I assume, also, your piezo is a true piezo element, (hence your drive technique), and that it does not have any circuitry hidden within the case of the piezo?

Correct.

 

Lastly, I assume you feel that the spikes you are seeing are "real", and not artifact?

I do - though I could be wrong ...

 

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joeymorin wrote:
So the moral/question is, does one or both of your two piezo drive pins ever go high-impedance?  If so, can it happen immediately after a tone is played?  If so, then much higher voltages than you have seen during drive, and captured above, may be hitting those pins, and that could indeed cause problems down the road.

That's the kind of thing I was initially thinking of and the reason why I was looking at the drive signal in the first place.

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Is image #3 representative of one of the spikes? At the edge, it appears that the port pin is simply NOT controlling the piezo. The shape of the waveform after the edge looks like a part of the piezo oscillation (with, maybe, the other end of the piezo grounded though the other port pin). Are these pins set up as "open drain" outputs or totem-pole (logic level) or some of each, part time?

 

It might be worth while to look at the two port pins differentially. Or, at the very least, dual-trace, so that you can compare what is happening at both port pins where that edge occurs.

 

I wonder if the excitation timing is slightly different from the natural piezo frequency, and it is accumulating phase errors to the point where it is switching at the "wrong" point in the waveform, resulting in the observed jump/spike.

 

Jim

 

 

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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ka7ehk wrote:
Is image #3 representative of one of the spikes?

Yes

 

At the edge, it appears that the port pin is simply NOT controlling the piezo.

Good point - will have to look further... 

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I wonder if the spikes are the result of tickling the resonance of the piezo.

 

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How much over voltage does it take to induce CMOS latch-up?  Latch-up will certainly increase current draw but 1 mA seems low for that scenario.

Letting the smoke out since 1978

 

 

 

 

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Do you have access to the returned / damaged boards from your client ?

 

I have vague memories of the ESD diodes ( at least in AVR's) being capable of handling 4mA continuously (although not reccomended ?).

Weird thing is that the voltage is 800mV over Vcc, but I see no evidence of the ESD diode conducting.

If you have a bunch of the damaged boards you could measure the standby current if various pins are decoupled from their output.

If you write a few small programs to toggle pins under differnt loads, you might see ESD damaged transistors on an oscilloscope.

 

I find that at least the top ESD diodes are easy to measure with a standard Multi Meter. You may measure increased leakage currents through damaged diodes from an un-powered circuit.

 

Does this fault condition persist on returned PCB's? It could even be a software error of a uC waking up too often when it should not.

 

CMOS latch-up seems unlikely. Latch-up tends to act as a thyristor and results in hard shorts.

 

Alternative:

If you look at sites such as hackaday it is quite popular to "decap" IC's with strong acids etc, even by hobbyists.

If there is any ESD damage it should be visible on the bare die.

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Last Edited: Fri. May 4, 2018 - 02:27 AM
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What happens to Vcc during those spikes? If the answer is nothing, then, as Paul alludes, maybe the top-side protection diodes are gone.

 

Jim

 

Jim Wagner Oregon Research Electronics, Consulting Div. Tangent, OR, USA http://www.orelectronics.net

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Yes, software is the main suspect - which is why I have them to look at.

 

But I saw these spikes, and wondered if they could, at least, be a contributing factor.

 

On the ones I've seen, the excess standby current seems to be permanent; otherwise, the boards are operating "normally"

 

The chip is in a QFN package, and the board is tiny - so isolating individual pins is "challenging" ...

 

surprise

 

 

 

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Last Edited: Fri. May 4, 2018 - 06:39 AM
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Why do you think it is the piezo...could it be some other circuitry?  What happens if you remove the piezo? 

An IO pin that should be an input that gets set as an output could cause contention(current). 

How do you measure the current? As always, is there a schematic?

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As noted, it's not that I think it is the piezo - I'm just wondering if it could be the piezo.

Or if the piezo should be a cause for concern...

 

Quantitatively, I measure the "standby" current with a DMM; qualitatively, I'm using a sense resistor, current-sense amp and the 'scope to watch the current profile - blue trace in the screenshots.

 

Sorry, can't publish the schematic.

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ka7ehk wrote:
I wonder if the excitation timing is slightly different from the natural piezo frequency, and it is accumulating phase errors to the point where it is switching at the "wrong" point in the waveform, resulting in the observed jump/spike.

 

That was were I was going next, but West Coast Jim beat me to it!

 

awneil wrote:
Are you working at 3V? I guess the overshoot wouldn't be so significant at 5V ?

5v, M48's mostly, no experience with SAM parts, but you were just investigating and wondered if this may be the cause.

You could try placing a resistor in series with one or both legs and see if it helps. 

 

My guess is its not related, I'd look for a bug in the code that is preventing the mpu from achieving as deep a sleep mode as intended.

Does a failed unit always draw more current, have you tested a failed unit with a simple sleep mode current test?

 

Good luck with the troubleshooting.

 

Jim

 

 

 

 

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Are the pins used digital only or do they also have analogue input capabilities?

 

Pins capable of analogue are usually less robust.

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NXP AN2434, even if about another uC family, has some good info on ESD diodes.

#1 This forum helps those that help themselves

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 What happens to the current if you remove the piezo? 

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[should have read all the answers before commenting, but still believe this is the root cause.  Series R will limit current into the diodes, but a shunt path will reduce voltage spikes. I assumed that you were seeing the spike at the end of a toggle sequence, but even in a constant drive mode, the CMOS pair are a break before make switch (or there would be momentary Vdd to Vss short).  You have an open circuit resonator on every cross-over, IMHO.]

 

Andy,

 

The piezoelectric element resonates.  If you drive it with a voltage it produces motion, but the motion continues after the drive signal and motion moves charge.  (Piezen - to squeeze --> electricity).

 

With the driver off, the impedance is probably high, so the charge is running into the ESD clamps.  Eventually the ESD diodes leak.

 

If you can afford a little more drive current, a shunt resistor will reduce the voltage that the piezo pushes back. 

Alternately, a bidirectional TVS across the piez0.

jeff

Last Edited: Mon. May 7, 2018 - 01:46 AM
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It's not clear from any of the posts above. Are you leaving a DC voltage across the piezo after bleeping is done ?

 

These little piezo discs don't like a permanent DC bias left on them for long periods. The datasheets I've read omit this fact; you have to learn it by experience (read Customer Complaints). They suffer permanent damage after 3 months or so of DC bias and start taking current.

 

It's an easy fix: Simply drive both sides of the element to 0V after bleeping.

 

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I was aware of this, and it should've been taken care of - but worth checking ...

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