Some GPIO to source and some to sink current

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I'm building a circuit using a ATMega644 (40ma per pin, 400ma total between VCC and GND) and wish to drive a 10-bar LED graph among other devices. I was thinking of limiting of the current for each bar graph segment to 20ma, or 200ma total.

So, while 200ma will be below the 400ma total for the device, would it make electrical sense to make 1/2 the bar graph segments be active low (sink current) and the other 1/2 active high (source current)? With that, it seems like I'd have net zero current between VCC and GND, but does the ATMega distribute current internally in that way?

Thanks!

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Using the latest 2593L–AVR–02/07 Atmega644 data sheet, page 315 Electrical Characteristics Absolute Maximum Ratings: it shows DC Current per I/O Pin 40.0 mA and DC Current VCC and GND Pins 200.0 mA. I do not know where you got 400 mA from. Are you sure you used the right data sheet and it is the current data sheet? Keep the title in mind. These ratings are “Absolute Maximum” and should be treated like exceeding them even a little will destroy the Atmega644 chip. I'm not saying it will literally destroy the chip, but you should treat this information as it that is what it means, that is if you want to chip to work reliably under the complete range of specified conditions.

You did not read far enough down the page through section 26.2 DC Characteristics. Page 316 has note 3 for current sinking (IOL) and note 4 for current sourcing (IOH) that describes how much current can be handled. Refer to page 3 Figure 2-1 Block Diagram for a drawing of the Port Drivers. These notes make up a complicated description of how much current you can sink or source through the port pins and is obviously based on how the chip internally distributes power and grounds. It depends on your Vcc voltage, which pins you actually use and what combination you use them in when you build your circuit.

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Thanks for the reply and useful information, Mike.

You are indeed correct, I did misread the total Vcc-GND current, 200ma is specified for which my 10x20ma bar graph would exceed. So, it looks like either external transistors to switch the leds (or some other buffer IC) or sinking some/sourcing some GPIO to balance the current.

I'll read further down in the electrical specifications as you suggested to look for more detailed currrent flow information to see if it's possible to source 100ma and sink 100ma on certain pins while allowing the other poirts of the 644 to get the current they need.

Thanks again for the helpful reply!