emulated eeprom --new mode or same old?

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I was poking around the Atmel/Microchip AVR search page, was looking for the AVR EEPROM selection column & could no longer find it...instead only found a column labeled "emulated eeprom in flash" , which seems to match the former EEPROM column.

 

Has something changed regarding EEPROM technology implementation, or perhaps the offerings?  If so, what/who/where/when?  I randomly downloaded a few of the newer AVR datasheets, but found no datasheet mention of "emulated eeprom" anywhere (but only looked at a few).

Just wondering what/if anything is transpiring.

 

http://www.microchip.com/ParamChartSearch/Chart.aspx?branchID=1012

   

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I think its an error on the webpage.  Wonder what "HEF" stands for.

 

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jgmdesign wrote:
...Wonder what "HEF" stands for.
High Endurance Flash

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In the PIC world, HEF takes the place of EEPROM on some microcontrollers. I haven't done much with it, but as I recall you have to tell the linker not to put code in the HEF locations that you intend to use. You also have to do a read-modify-write on a full page of flash, no individual byte writes within a page. In the PIC, instruction words are 14-bit, but only the bottom 8 bits of HEF pages are high endurance. Probably not an issue for AVR. This is all from memory so YMMV.

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Many (most?) ARM-based chips (all manufacturers, not just Atmel) don't have real EEPROM - so, if you want non-volatile data storage, you have to emulate it in Flash.

 

I guess it's some sort of process thing?

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I would think it has more to do with real-estate.  IIUC both EEPROM and flash can be implemented with the processes involved.  EEPROM, however, is byte-(or-word)-addressable for erase/write, whereas flash is page-addressable.  This byte-addressability is accomplished with individual transistors for erase and write for each byte/word, making EEPROM density inherently lower than flash.

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