5V AVR to 3.3V microSD _and_ SPI RTC (1.8-5.5V)

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I've been reading various pages about this, and there seems to be many approaches.

 

Does it make sense to put the RTC also in the 3.3V "realm" along with the microSD ?

 

So far, it looks like SN74LVC245A is a good way to convert from 5V safely to 3.3V.

 

I could use this to drive MOSI, SCK, SD_SS, RTC_SS.

 

On the return, is 3.3V taking chances on not working with 5V or is it generally solid?  Connecting the MISO from both devices directly would work if you only activate on at a a time.  Or should this be level shifted from 3.3V to 5V to be done properly?  What to use?

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Well, do you feel lucky?

 

Actually, it depends upon the micro reading the data, and on the specific device providing the signal.

 

As an example, the M328PB data sheet, Electrical Characteristics, 34.2 DC Characteristics table says that the minimum voltage to be read in as a Input High, (on all pins except Xtal 1 and Reset), is 0.6 * Vcc. if the micro is running on 5 V.

 

So if you run at 5.0 V, that means the input signal must be > 0.6 * 5.0 = 3.0 V.

 

So the next question is what is the actual driver providing the signal?

Recall that not all devices are rail-to-rail, and the output High might be less than 3.0 V when running on a 3.3 V power supply.

You would have to check the Minimum output High voltage for the device driving the micro's input and make sure that the minimum was > 3.0 by whatever safety margin you desire.

 

For tinkering around on the bench it will probably work, and it isn't a problem.

 

For one of your commercial products, with variable battery voltages, variable operating temperatures, and no control over which exact model of SD card the customer is using, you might well wish to design for a better guaranteed safety margin for reliable operation.

 

JC

 

 

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Ok, something like a 74lvc125 for the AVR outgoing signals.

 

What logic would be good for translating the incoming signal MISO from 3.3V to 5V?  Would a TTL part do the job with its 2.0 high threshold?

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I'd tell you the level translator chip I last used, but I didn't use one, I used discrete transistors...

That is definitely not a good choice these days for a commercial product, too many parts involved, vs just a chip.

 

Lets see what some of the others have used, and recommend.

 

I trust you have looked at Nard's Sticky Thread in General Electronics: Electronics Interfacing 101, a.k.a. Tips & Tricks.

 

It provides some good info.

 

JC

 

Edit:

Don Kinzer, Founder of ZBasic, has an App Note: AN-213 External Device Interface which is also worth reading through.

 

JC

Last Edited: Wed. Mar 7, 2018 - 04:20 AM
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What logic would be good for translating the incoming signal MISO from 3.3V to 5V

A simple common gate (or base) FET or transistor. ie base to 3.3V, source to the 3.3V MISO pin, drain with a 4K7 pull up resistor to the  3.3V MISO pin.

 

And why do Japanese people have MISO soup?

John Samperi

Ampertronics Pty. Ltd.

www.ampertronics.com.au

* Electronic Design * Custom Products * Contract Assembly

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Nard's sticky is a classic; I remember reading that so many years ago!

 

MISO soup????

Last Edited: Wed. Mar 7, 2018 - 04:42 AM
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Yep http://www.taste.com.au/recipes/...

 

Never tasted it but very popular in some hotels on the Gold coast QLD. Japanese used to own a lot of places there before going broke about 20 years ago.

John Samperi

Ampertronics Pty. Ltd.

www.ampertronics.com.au

* Electronic Design * Custom Products * Contract Assembly

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That looks about right.  I lived in Japan for about 3 years as a child - I remember some places that sold soup like that had like 20 bowls in a row that they were selling as distinct products but they are all looked the same to me!!

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Ok, what about:

 

74LVC125 for driving the MOSI, SCK, SD_SS, and possibly RTC_SS in the outgoing direction.  It tolerates 5.5V and can have its VCC connected to 3.3V.

 

Then in the other direction, I found a single SN74AHCT1G125DBVR for MISO.  It is a TTL part so it should go high at 2V and can be powered at 5V.

 

The SN74AHCT1G125DBVR also has an OE that could be connected to SD_SS from the AVR so it would only have its output active when the SD is selected with SD_SS.

 

Then I could put the RTC on the 5V side.  Or it could be put on the 3.3V side if that OE was just tied low all the time.  Any benefit either way?

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Can you not just run the AVR at 3V3 ?

 

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Good system design starts by looking at all of the components involved and picking those that are the best match.

One thing you have not considered is running the atmega at 3.3 volts as well as all the other devices. 

 

Is this a one off project or do you plan to make 10k units?

 

Jim

 

 

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My first thought would be 3.3V MCU. No extra components.
.
SPI Master is easy to support level shifters because all the lines are unidirectional.
GPIO is less easy. You need to change direction for read and write. There are bidirectional buffers but life becomes compilcated.
.
No other manufacturer markets chips that have to be de-rated for 3.3V. They produce chips designed for 3.3V and sometimes 5V tolerant.
.
David.

Last Edited: Wed. Mar 7, 2018 - 01:46 PM
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Can't do the 3.3V, I wish I could.  The rest of the system is a Z80 with SRAM.

 

I'm not planning on making 10K, but I'd like to make more than one.  It is a Z80 SBC using an AVR to perform most of the I/O.

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alank2 wrote:

Can't do the 3.3V, I wish I could.  The rest of the system is a Z80 with SRAM.

 

And you left out that little detail why?

 

i'm out

Jim

 

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alank2 wrote:
It is a Z80 SBC using an AVR to perform most of the I/O.

So can't you run the AVR at 3V3, and just have the level translation between the AVR and the Z80?

 

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Being a bit mangler I've just used
.
http://www.futurlec.com/Mini_Logic.shtml
.
In the past. So perhaps just copy the design?

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awneil wrote:

So can't you run the AVR at 3V3, and just have the level translation between the AVR and the Z80?

 

The AVR is connected to the Z80 mostly through the memory interface - all of which is 5V.  D0-D7, A0-A18, RD, WR, etc.

 

Only the SDcard has to be 3.3V.

 

I'm not sure the futurlec board can do BOTH directions at once, 5->3 and 3->5.  Probably a single dir pin that controls the direction.

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ki0bk wrote:

And you left out that little detail why?

i'm out

 

The original question was how to go from 5V to 3.3V - I didn't think it was that important to say why I was at 5V.  ki0bk - I do appreciate your help.

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alank2 wrote:
I'm not sure the futurlec board can do BOTH directions at once, 5->3 and 3->5. Probably a single dir pin that controls the direction.
You are right - I was basically just saying "you might want to explore the 74LCX245" in fact.

Last Edited: Wed. Mar 7, 2018 - 05:16 PM
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TXB0104.

 

Sparkfun has a breakout board to play with:

https://www.sparkfun.com/products/11771

"Experience is what enables you to recognise a mistake the second time you make it."

"Good judgement comes from experience.  Experience comes from bad judgement."

"Wisdom is always wont to arrive late, and to be a little approximate on first possession."

"When you hear hoofbeats, think horses, not unicorns."

"Fast.  Cheap.  Good.  Pick two."

"We see a lot of arses on handlebars around here." - [J Ekdahl]

 

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Thanks clawson.  joey I saw the TXB0104, but I also saw some people complaining about it sometimes can get confused about the direction.  I'd like a single device solution, but that does concern me a bit.

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me people complaining about it sometimes can get confused about the direction

How exactly?

 

It is a 'directionless' translator, meaning:

 

 

9.3.1 Architecture
The TXB0104 device architecture (see Figure 8) does not require a direction-control signal to control the
direction of data flow from A to B or from B to A. In a DC state, the output drivers of the device maintain a high or
low, but are designed to be weak, so the output drivers can be overdriven by an external driver when data on the
bus flows the opposite direction.
The output one-shots detect rising or falling edges on the A or B ports. During a rising edge, the one-shot turns
on the PMOS transistors (T1, T3) for a short duration, which speeds up the low-to-high transition. Similarly,
during a falling edge, the one-shot turns on the NMOS transistors (T2, T4) for a short duration, which speeds up
the high-to-low transition. The typical output impedance during output transition is 70 Ω at V CCO = 1.2 V to 1.8 V,
50 Ω at V CCO = 1.8 V to 3.3 V, and 40 Ω at V CCO = 3.3 V to 5 V.

9.3.5 Pullup or Pulldown Resistors on I/O Lines
The device is designed to drive capacitive loads of up to 70 pF. The output drivers of the TXB0104 device have
low dc drive strength. If pullup or pulldown resistors are connected externally to the data I/Os, their values must
be kept higher than 50 kΩ to ensure that they do not contend with the output drivers of the TXB0104 device.
For the same reason, the TXB0104 device must not be used in applications such as I 2 C or 1-Wire where an
open-drain driver is connected on the bidirectional data I/O. For these applications, use a device from the TI
TXS01xx series of level translators.

10.1 Application Information
The TXB0104 device can be used in level-translation applications for interfacing devices or systems operating at
different interface voltages with one another. It can only translate push-pull CMOS logic outputs. If for open-drain
signal translation, please refer to TI TXS010X products. Any external pulldown or pullup resistors are
recommended larger than 50 kΩ.

For your SD card purposes, it should be fine.  There are surely other ICs which are unidirectional, if you're concerned.

"Experience is what enables you to recognise a mistake the second time you make it."

"Good judgement comes from experience.  Experience comes from bad judgement."

"Wisdom is always wont to arrive late, and to be a little approximate on first possession."

"When you hear hoofbeats, think horses, not unicorns."

"Fast.  Cheap.  Good.  Pick two."

"We see a lot of arses on handlebars around here." - [J Ekdahl]

 

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I don't know exactly, I saw at least two people in my search say it worked most of the time, but that they had some issues with it.  One of them said they had to power cycle the higher voltage to get it working again.

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@Alan,

 

Now that we know you are interfacing with the 5V Z80,  it is pretty clear that you just put the unidirectional level shifter on the 3V SPI bus.

Everything else runs at 5V.

 

There are a whole range of chips that can do unidirectional level shift.    Or even just use resistors in a voltage divider.

 

David.

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FWIW we connect the signal from 3.3V SD card directly to the 5V AVR pin, and don't have any problems in a family of controllers.  Doc is skeptical of that.  If indeed the power for the SD card is 3.3V I don't see how the high-impedance AVR input pin would drag down the signal to 3V or below as Doc mentioned.

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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I hear what you are saying and your point is well taken.

 

blush  One can ignore what follows, brain wasn't functioning too well at the time it was written...

 

Unfortunately, the typical AVR data sheet doesn't spec the minimum, output high voltage for a "no load" condition.

The M168PA, for example, provides 1 data point, V output high is >= 2.3 V with Vcc = 3 V, (at a 10 mA Iout), (which would fail for the current project needs).

So, draw the curve any direction you want, you only have one data point to work with.

 

I guess part of my point is that the classic output driver on many digital chips isn't designed to maximize rail-to-rail output swings.

For most digital situations it just doesn't matter as long as the High is high enough, and the low is low enough.

 

This comes up frequently when people use an AVR to drive a PWM signal and expect 0 % PWM to be 0.0 V output, and it isn't, it sits a few tenths of a volt above 0.

If you really want 0 % to provide 0 volts its a problem.

 

I guess my thoughts are this:  When bringing up a new design there can be both hardware and software issues/bugs/etc.

It is nice to know, as a designer, where you have "cut corners", so you know where to look if something fails to perform as expected.

Engineering is all about trade-offs, and as long as you know, up front, what impact your design decisions will have on the system you're good.

 

In this specific case it wasn't stated what the driver was, (AVR or otherwise), and without a schematic it isn't clear exactly what the power supply sources will be, or if there will be any other devices on the same SPI bus, etc.

 

So my answer is worst case, the design may be marginal; not clear cut, no problem, move on.

 

Additionally, if it isn't obviously going to work without any problem, and Murphy is still around, who wants to tell someone the design is fine and then have half their commercial boards fail.

 

In this case, I think it is reasonable to at least outline the factors that one, as a designer, ought to be looking at, and then make an informed, intelligent design decision.

 

In this case the data sheet helps somewhat, be since it doesn't provide no-load V out high minimum voltage level data, one will either have to make some test measurements,  or some assumptions, or both. 

But at least one is making an intelligent, proactive, informed design decision.

 

This case is very similar to the other current Thread on a micro's internal oscillator's, (and the Div by 8 module's), upper frequency limit.

Once again, bottom line, it isn't directly spec'd by (Atmel) Microchip, and as I pointed out in that Thread there are two conflicting comments made in the data sheet that are at least partially relevant.

 

So, one expects it to work, but one has to do some careful thinking about it, and then make a design decision.

 

If the flashing orange LEDs for my Halloween pumpkin don't work its no big deal.

If the grid voltage on my X-ray tube fails its a major big deal.

 

Decisions, decisions!

 

JC

 

Edit:  Brain failure, switch modes and chatted about Vout levels instead of Vin levels... blush

 

Last Edited: Fri. Mar 9, 2018 - 08:51 PM
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DocJC wrote:
Unfortunately, the typical AVR data sheet doesn't spec the minimum, output high voltage for a "no load" condition.

???  You are losing me.  What does that statement have to do with a signal coming from an SD card at 3.3V into a high-impedance AVR input pin (MISO)?

 

And I've re-read that quote severl times.  What is a "minimum, output high voltage"?

 

So, taking that side excursion, this old bit-pusher sees roughly 5V on a 5V Vcc unconnected output pin.  Indeed probably not to the rail but close enough?

 

DocJC wrote:
This comes up frequently when people use an AVR to drive a PWM signal and expect 0 % PWM to be 0.0 V output, and it isn't, it sits a few tenths of a volt above 0. If you really want 0 % to provide 0 volts its a problem.

No it is not a "problem", if that is needed for the app.  If for your app "no means no" then you use inverted PWM.  [the situation has been often discussed here.  and in the datasheet as well, IIRC?  With an AVR8 Fast PWM you cannot get "full on" and "full off" with one setup.  so either live with 0=>0% and full-on being 255/256, or treat full-on (or full-off) aqs a special case and disable the PWM.  But it has nothing to do with output driving to the low rail.  Certainly not "a few tenths of volt".]

 

 

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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Going back to the datasheet again, while the guaranteed value may be stated as e.g. 0.6*VCC giving 3V on a 5V setup, the typical has even more leeway -- circa 2.6V

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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DocJC wrote:
In this case the data sheet helps somewhat, be since it doesn't provide no-load V out high minimum voltage level data,

Well, in my opinion the datasheet of AVRs >>does<< give that information, in the Pin Driver Strength graphs.  While we don't have any hard numbers we can see from the plots that at both rails the loss is a few millivolts.  Certainly not a tenth of a volt or a number of those tenths.

 

DocJC wrote:
In this specific case it wasn't stated what the driver was, (AVR or otherwise),

Yes it was stated -- microSD.

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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blushblush

 

Don't know what I was thinking.

 

Of course, if you are going to get it wrong, you might as well get it really wrong.

 

So, ignore the post above, but the values in my first post, (0.6 * 5 = 3.0 V to be in spec for a High level input signal), and the latter concept in the latter post, are still good.

 

I was clearly thinking about inputs and outputs and my brain switched gears in the middle of the thought.

 

The overall concept is still valid, what is the actual driver on the actual (user supplied ?) SD card, and how much safety margin do you want?

 

Switching topics,

 

I think my comment on the output drivers is still valid, but I'd love to be shown wrong (again...).

Perhaps the PWM example was a poor example.

 

The M168 data sheet says that the Vol, (Output low voltage), Maximum, on a 5V supply, is 0.9 V.

That means that when outing a Low level, the chip is in spec with an output voltage anywhere from 0 up to 0.9 V.

I've certainly seen 0.4 - 0.5 V before, and it counts as several tenths of a volt above 0 V, (when one might well be expecting 0 V if they didn't know that a logic low doesn't mean 0.0 volts).

 

Regarding the PWM comment, we agree: "With an AVR8 Fast PWM you cannot get "full on" and "full off" with one setup."

If you have it set up one way you are screwed on the other end, unless you tweak the software.  Hack, Hack...

 

The General Digital I/O diagram just shows a generic buffer for the pin driver, it doesn't show the transistor output configuration, (except for the pull up resistor transistor).

 

I think how low the PWM will go depends in large part on the load attached to the pin. 

 

If the output is 0 %, (even ignoring the brief pulses that one mode has as a special feature...), the spec sheet says it is in spec with 0.9 V on the output pin.

 

I agree, also, that the graph you showed shows a better safety margin regarding the input voltage level, but that is under the typical characteristics section, while the table is the guaranteed performance section.

Which do you design to?

 

Obviously you have tons of chips in the wild, and you would change the design if it wasn't working for you.

I still think its best to walk in with your eyes wide open, knowing what design decisions you have made, in case you want a higher safety margin, or in case something doesn't work as expected. 

(Not talking about your designs, talking about the generic question on the Forum: "Can I do this...",  the answer is often "Maybe", and not a definitive Y/N.)

 

JC

 

 

 

 

  

 

 

  

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DocJC wrote:
the values in my first post, (0.6 * 5 = 3.0 V to be in spec for a High level input signal), and the latter concept in the latter post, are still good.
DocJC wrote:
how much safety margin do you want?

As mentioned, yes 3.0V would be the guaranteed vaue.  Typically about 2.6V or so.  That is 20% margin from the nominal 3.3V.  yes, if the 3.3V Vcc drops to 3.0V then there is not much margin.  Do you really have any proper power supplies meant for continuous operation of an AVR8 app that drop more than 10% below nominal?

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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Nope.  (Therefore, Agreed!)

 

Alan said 3.3 V, so take it for granted that's what he means, and not a 3.0 V regulator, or a battery project.

 

I felt guilty, so I walked from upstairs to the basement to drag out my O'scope and power up a Nano and look at a PWM output signal.

I used the language's high level command to set up the PWM output, as that is faster than setting the registers myself, so I'm not sure what the exact configuration is, however:

 

V+ = 4.5 V

V high = 4.5 V

V low = 0 V

 

So, not rail-to-rail, but a low gives 0.0 V in this setup.

 

Well, I got us way off topic, so enough for now.

 

We'll let Alan power up his prototype with or without a level interface, and expect it to work!

 

Thanks for keeping me honest, major brain malfunction demonstrated above...

 

JC

 

Edited.

 

Output was rail-to-rail with no loads.

 

JC

 

Last Edited: Sat. Mar 10, 2018 - 01:35 AM
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I would feel pretty happy with a 3.3V MISO signal on a 5V system.   

 

SPI has CMOS push-pull outputs.   So you can expect rail to rail signals.

 

You can level-shift up to 5V if you are paranoid.   

 

David.

 

 

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DocJC wrote:
V high = 4.5 V

???  What is Vcc level?  What is connected to pin?

 

With a light load, I'd expect the high level to be very close to Vcc.

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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Darn.

I put the scope away.

And I assumed Vcc was 5.0, but in retrospect it was a USB supply..., so it could have been 4.5 V...

It was open circuit output, I did not have any load connected to the pin.

 

Back down stairs I go...

 

JC

 

Edited

 

And the verdict is:

 

Rail-to-rail !

The USB is 4.5 V, the High is 4.5 V.

 

I'm going to have to dig back in my old projects to find where I've seen Vlow > 0 V, because I distinctly recall it being a problem for me once when I wanted 0 % --> 0V, and it wasn't.

It was higher than I could tolerate for that circuit, and I then had to go hunting and digging to verify that it is allowed to be significantly > 0.

 

But it sure is rail-to-rail on this setup today! (Arduino Nano).

 

JC

 

Last Edited: Sat. Mar 10, 2018 - 01:40 AM
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At this point I'm planning on using a 74LVC125 to go from AVR (5V) to SPI (3.3V).  It will be powered by the 3.3V and tolerate the 5V from the AVR just fine.

 

In the other direction I found a SN74AHCT1G125DBVR which as a single buffer only TTL part only requires 2V for a logic high signal and it will bepowered by the 5V and convert the MISO signal frm the microSD back up to 5V.

 

I tested them with my power supply to see how they would perform and other than that dead zone that isn't high or low, they seem to work fine.  We'll see how they do when I get some memory hooked up to them and see what kind of speed I can get it to run.

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DocJC wrote:
I'm going to have to dig back in my old projects to find where I've seen Vlow > 0 V, because I distinctly recall it being a problem for me once when I wanted 0 % --> 0V, and it wasn't.

When you mentioned it earlier, you mentioned "PWM".  So I'd guess that you were seeing the one count out of n with normal (non-inverted) PWM.  That could be some millivolts -- 1/250 x 5V => 20mV, right? 

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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This was years ago, and I recall I needed 0 V for 0% and it was sitting a 0.2 or 0.3 V, very much non-0.

That was when I first learned that the micro's output driver didn't necessarily have to go to (near) 0 and it was still in spec.

I don't think this was the occasional pulse "feature", as I'd seen that when I first started using AVR's, as it is easy to spot on the O'scope.

I recall thinking it was a code or T/C setup issue on my part, and careful reading of the data sheet showed it to be a hardware feature.

That one has an easy work around if one watches for 0% and just switches to 100% with an inverted output, (still a hack, but easy to do).

 

Oh well.  Perhaps I will stumble across it while looking for something else.

 

Perhaps its time to retire from electronics and take up golf...

Trade in the O'scope for a set of clubs.

 

JC

 

 

 

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That was when I first learned that the micro's output driver didn't necessarily have to go to (near) 0 and it was still in spec.

I know that other pins sending current through gnd would also raise up the level of "low" for all pins.  So if several port pins were illuminating leds to gnd (say 50ma tot) , that will raise the gnd level of the entire chip (other port pins) by some noticeable amount.

 

I just re-tried it.... set ports outputs low, tied one port pin to 5V via 200ohm (25ma)...that raised a different (monitor) pin by 12mv......tied a different pin with 200ohm, that raised the monitor pin by 20mv.   Tied both pins, that raised the monitor pin to 32mv.  So as different leds come on , or other things happen, the pwm could shift around somewhat.  Moral of the story...if using PWM & want stability, keep the pin currents low.   Might repeat this on the high levels to see how much the 5v droops.

 

The datasheet gives some loading info, but says little about "voltage cross talk" between pins.

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

Last Edited: Sat. Mar 10, 2018 - 04:52 PM
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I expect that's largely a result of the non-zero resistance of the bonding wires from the pins to the die. Any current through them will result in some voltage drop.

"Experience is what enables you to recognise a mistake the second time you make it."

"Good judgement comes from experience.  Experience comes from bad judgement."

"Wisdom is always wont to arrive late, and to be a little approximate on first possession."

"When you hear hoofbeats, think horses, not unicorns."

"Fast.  Cheap.  Good.  Pick two."

"We see a lot of arses on handlebars around here." - [J Ekdahl]

 

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I expect that's largely a result of the non-zero resistance of the bonding wires from the pins to the die. Any current through them will result in some voltage drop.

It's funny to open a TO-3  25Amp NPN and see the little wire.   Certainly not the 12 gauge I have hooked up externally. 

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

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I expect that's largely a result of the non-zero resistance of the bonding wires from the pins to the die. Any current through them will result in some voltage drop.

I tried to do a bit of math on that, although it's somewhat futile without knowing the size or matierial of the bonding wires.

 

Some Googling has suggested that diameters of 15µm through 75µm are likely, whereas power electronics may go up to several hundred µm.

 

A 12 mV drop (or lift of GND) for a 25 mA current suggests a resistance of:

E = IR

R = E/I

  = 0.012 / 0.025

  = 0.48 ohms

 

A look at a chart for copper (while we may traditionally think of bond wires as being made of gold or aluminium, use of copper has grown over the last several years) from:

https://www.powerstream.com/Wire_Size.htm

... shows that 40AWG has a diameter of 78.74µm, and a resistance of 3.440 ohms/m.  Resistance is an inverse function of cross-sectional area, so a 78.74µm wire would have an area of 6200µm2, and a 15µm wire would have an area of 225µm2, or 0.03629 the area, so its resistance would be about 3.440/0.03629 = 94.791 ohms/m.  In order to get 0.48 ohms, you'd need about 5 millimetres, which seems excessive.

 

However, there will be other factors at work.  There's no reason to think that the AVR's GND and Vcc bond wires would be at the small end of the range, but the bond itself will have significant resistance, as will the on-die bus.  Also, on many devices, not all I/O output drivers share the same GND bus, nor the same VCC bus.  This is evident in the DC Characteristics of, for example, the m48 family:

3. Although each I/O port can source more than the test conditions (20mA at V CC = 5V, 10mA at V CC = 3V) under steady state
conditions (non-transient), the following must be observed:
ATmega48A/PA/88A/PA/168A/PA/328/P:
1] The sum of all I OH , for ports C0 - C5, D0- D4, ADC7, RESET should not exceed 150mA.
2] The sum of all I OH , for ports B0 - B5, D5 - D7, ADC6, XTAL1, XTAL2 should not exceed 150mA.
If II OH exceeds the test condition, V OH may exceed the related specification. Pins are not guaranteed to source current
greater than the listed test condition.
4. Although each I/O port can sink more than the test conditions (20mA at V CC = 5V, 10mA at V CC = 3V) under steady state
conditions (non-transient), the following must be observed:
ATmega48A/PA/88A/PA/168A/PA/328/P:
1] The sum of all I OL , for ports C0 - C5, ADC7, ADC6 should not exceed 100mA.
2] The sum of all I OL , for ports B0 - B5, D5 - D7, XTAL1, XTAL2 should not exceed 100mA.
3] The sum of all I OL , for ports D0 - D4, RESET should not exceed 100mA.
If I OL exceeds the test condition, V OL may exceed the related specification. Pins are not guaranteed to sink current greater
than the listed test condition.

This can be visualised here:

(from https://playground.arduino.cc/Main/ArduinoPinCurrentLimitations)

 

(although note that this graphic doesn't include PB7:6, nor PC6)

 

This might help to explain why you saw 12 mV in one case, and 20 mV in the other.  Maybe due to pins using different internal GND buses.  The on-die interconnects between GND buses and Vcc buses would have a real-world resistance, and contribute to the overall voltage drop.

 

Finally, the RDS(ON) of the N-Channel and P-Channel MOSFETS which form the output drivers will be dependent upon the gate voltage, which will itself be dependent upon the potential between the GND and Vcc buses used to drive the logic which switches that gate.

"Experience is what enables you to recognise a mistake the second time you make it."

"Good judgement comes from experience.  Experience comes from bad judgement."

"Wisdom is always wont to arrive late, and to be a little approximate on first possession."

"When you hear hoofbeats, think horses, not unicorns."

"Fast.  Cheap.  Good.  Pick two."

"We see a lot of arses on handlebars around here." - [J Ekdahl]

 

Last Edited: Sat. Mar 10, 2018 - 07:29 PM
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@joeymorin:

As usual, a very good & thorough analysis.  I've used PWM many times over the years & luckily never ran into (or maybe never noticed) this issue.  I probably was just talkin' to other chips with logic levels, so no "current induced shifts".   If someone was doing something highly precise, it could be maddening-- "hey this worked perfectly last week" (when leds, little buzzer, etc in different state).  Worse yet, it could be a transient (blinking led, anyone)!

When in the dark remember-the future looks brighter than ever.   I look forward to being able to predict the future!

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Hai

Mostly the earlier ATMega could handle that 3.3V peripherals in 5Vdc PS.
It like my 8051+SCC with AVR as I/O. unfortunedly very sad still lying in my barn.

Tiro