Hi I have a simple question regarding the USART Data Register Empty flag. If the USART Data Register Empty Interrupt Enable bit is set in the UCSR0B register will the ISR(USART0_UDRE_vect) constantly interrupt until data is placed into the Transmit buffer?
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Joined: Mon. Nov 6, 2017
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Last Edited: Mon. Nov 6, 2017 - 07:07 AM