Pin Change Interrupts - Tiny26

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fabuser
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Posted by fabuser: Sat. Dec 30, 2006 - 10:17 PM
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Hi,

I'm having trouble with pin change interrupts in the Tiny26..

The following code should generate pin change interrupts on PB7, PB6, PB5, PB4, PA7, PA6, and PA3 (based on datasheet's documentation of PCIE1).. It will generate pin change interrupts on PA3 but not PA6 or PA7 (I haven't tested PB).. Does anyone know what I'm missing?

Thanks in advance!

; main program

reset:

   ldi temp, 0xff ; maximum RC clock

   out OSCCAL, temp

   ldi temp, 0xdf

   out SP, temp ; set stack pointer at top of SRAM

   sbi PORTB, txpin; init comm pin

   sbi DDRB, txpin

   ; set up PCINT1
   ldi temp,(1<<PCIE1); pin change int mask set
   out GIMSK, temp
   
   sei ; enable ints

   ;loop waiting for interrupts
   loop:

      rjmp loop

   ;pin change interrupt vector
   PCIntV:
      in S,sreg  ;store SREG

      rcall print_hello

      out SREG, S
      reti

Tags:

AVR Microcontrollers, megaAVR and tinyAVR
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Bronze Marktheusch
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Posted by theusch: Sat. Dec 30, 2006 - 10:32 PM
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You need to set up your interrupt vector table. Look at a complete ASM app from an app note, User Projects, www.avrbeginners.net , etc.

Lee

You can put lipstick on a pig, but it is still a pig.

I've never met a pig I didn't like, as long as you have some salt and pepper.

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fabuser
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Posted by fabuser: Sat. Dec 30, 2006 - 11:31 PM
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Hi Lee,

I have already set up the vector table and my interrupt service routine is being called based on a pin cange on PA3 .. This is how I know the pin change interrupt is firing on PA3.. I only posted the main program for clarity...

I only have experince with the 8pin AVRs which tend to require writing to GIMSK as well as PCMSK.. Does anyone have experience with the tiny26?

.include "tn26def.inc"
.equ txpin = PB1; transmit pin
.equ rxpin = PB6; receive pin
.def S =R0 ; Sreg storage
.def bitcnt = R16; bit counter
.def temp = R17; temporary storage
.def temp1 = R18; temporary storage
.def txbyte = R19; data byte

.cseg
.org 0
rjmp reset

.org IOPINSaddr
rjmp PCIntV
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heguli
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Posted by heguli: Sun. Dec 31, 2006 - 03:22 AM
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.org IOPINSaddr ...gave me a error when I tried to assembler.
It should be:
.org 0x02 ; pin change int

Regards
heguli

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dksmall
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Posted by dksmall: Sun. Dec 31, 2006 - 04:52 AM
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heguli wrote:
.org IOPINSaddr ...gave me a error when I tried to assembler.
It should be:
.org 0x02 ; pin change int

A peek into the t26def.inc file shows it should be "PCI0addr"

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heguli
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Posted by heguli: Sun. Dec 31, 2006 - 12:23 PM
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Quote:
A peek into the t26def.inc file shows it should be "PCI0addr"
I didn't knew that you can use names as well... something new everyday :D

Regards
heguli

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Izotech
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Posted by Izotech: Sun. Dec 31, 2006 - 01:38 PM
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Have you non-polarized inputs on PCI enabled pins? floating, without resistors or internal pull-ups? There is no ports initialization code.
Szymon

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fabuser
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Posted by fabuser: Sun. Dec 31, 2006 - 08:36 PM
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I guess I'm using a jacked up t26def.inc file but IOPINSaddr is just a .equ which gets swapped to $002 at compile time..

.equ IOPINSaddr = $002

Plus, I'm getting to the interrupt service routine after a pin change on PA3 so this is not the problem..

Quote:
Have you non-polarized inputs on PCI enabled pins? floating, without resistors or internal pull-ups? There is no ports initialization code.

The pins are not floating.. I'm actually building the circuit to sniff an external bus line which is held high at 5v.. I also have a common ground between the circuits.. It is true that I haven't initialized the port but I beleive it defaults to tri-state mode (high impedance) which is the intended configuration..

In any case, the key here is that PA3 will fire a pin change interrupt and my ISR gets called.. Under the same exact circumstances (default port configuration of input/hi-z and same test signal) PA6 and PA7 will not fire a pin change int.. This is not the expected result since PA3, PA6, and PA7 should all fire pin change ints when the PCIE1 bit is set in GIMSK..

Since I don't have experience with the tiny26, can someone confirm the assumption that PA6 and PA7 should fire an int under the same conditions as PA3 when PCIE1 is set in GIMSK?
If this assumption is correct, then I'm really baffled!

Thanks again..

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mikehg1
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Posted by mikehg1: Sun. Dec 31, 2006 - 09:30 PM
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Just looking at the docs quickly, it appears that PA3, PA6 and PA7 should all generate an interrupt on change if none of the alternate functions have been enabled for those pins. One other thing to check, is that avcc and agnd are both tied to vcc and gnd respectively.

Mike H.

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fabuser
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Posted by fabuser: Mon. Jan 1, 2007 - 06:10 PM
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Unfortunately, avcc and agnd are tied to vcc and gnd..

I've tried swapping out the chips multiple times, and used both tiny26 and tiny26L, with the same results each time.. very strange!

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heguli
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Posted by heguli: Mon. Jan 1, 2007 - 09:19 PM
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can you send all the code in here?

Regards
heguli

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fabuser
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Posted by fabuser: Tue. Jan 2, 2007 - 02:09 AM
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Here's the solution:

Quote:
You need to set the ACD bit in ACSR to disable the analog comparator;
PA6 and PA7 go to the analog compator by default, and the pin change
interrupts only work on otherwise unused pins. (See page 64 of the
tiny26 complete manual.)

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